Identify the terminals of the Timed Loop Input Node?

a) 1 = Source Name, 2 = Period, 3 = Priority, 4 = Processor
b) 1 = Frequency, 2 = Period, 3 = Priority, 4 = Processor
c) 1 = Source Name, 2 = Period, 3 = Precedence, 4 = Processor
d) 1 = Frequency, 2 = Period, 3 = Priority, 4 = FPGA
You must be a registered user to add a comment. If you've already registered, sign in. Otherwise, register and sign in.