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LabVIEW FPGA Idea Exchange

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The NI Idea Exchange is a product feedback forum where NI R&D and users work together to submit ideas, collaborate on their development, and vote for the ones they like best. View all of the NI Idea Exchanges to post an idea or add your opinion on an existing one today!
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--thatguy

Logic Operators and Arrays

Status: Completed
by Member --thatguy on ‎06-30-2010 11:33 PM

It would be nice to be able to use logic operators on arrays in Single Cycle Timed Loops.

  17863i0D7A4F514670B8AB

Status: Completed
Included with LabVIEW FPGA 2012.
Labels:
MarcoMauri

Multiple Compile Servers

Status: Completed
by Active Participant MarcoMauri on ‎05-14-2010 02:35 AM

I would suggest to implement the possibility to use at the same time multiple compile servers.

Imagine you have a project with many FPGA targets: it would be useful to send the FPGA vis to compilers working in paraller (a sort of Compiler Farm....).

 

Cheers,

Marco

 

Status: Completed
NI LabVIEW FPGA Compile Farm Toolkit is now available. http://sine.ni.com/nips/cds/view/p/lang/en/nid/209014
Labels:
Harlequinade

Minimize FPGA Compile server to icon

Status: Completed
by Member Harlequinade on ‎05-06-2010 08:03 AM

Having two computers, one for developing and one desktop pc for administrative work, I use the desktop as compile server for compiling the FPGA VIs. The compilation takes about 45 minutes, during which I can't develop anything in LabVIEW. By sending the data to the desktop pc, I can resume my work. Though on the desktop machine it's annoying to always leave this program open and get closed accidentally from time to time or I forget to start it in the morning after booting the pc.

 

Suggestions:

- Minimize the LabVIEW FPGA Compile Server to system icon tray

- Option for starting the Compile Server on booting of the OS. 

Status: Completed
Available in LabVIEW FPGA 2010.
Labels:
gsussman

Prompt the user when an FPGA compile has completed

Status: Completed
by Member gsussman on ‎11-19-2010 01:13 PM

I know that when connected to the compile server the local compile status window will show you when a compile is done, however that does seem to severely limit productivity in that the only way you can get back to working in LV is to disconnect from the compile server. The downside is that you don't get any feedback as to when your compile has completed. This is especially true if your compile server is running on a remote machine.

 

Why not add a feature to LabVIEW to allow disconnecting from the compile server but still provide a background polling feature to update the user when the compile has completed. Something as simple as a dialog box telling me that my compile is ready would be great. It would allow me to get back to work on other sections of the code while still closing the loop on the running FPGA compile process and alerting me that it is done.

 

If the system polled once every minute or so that would be more than adequate.

 

 

Status: Completed
Available with LabVIEW 2010 FPGA Module.
Labels:
About LabVIEW FPGA Idea Exchange

Have a LabVIEW FPGA Idea?

  1. Does your idea apply to LabVIEW in general? Get the best feedback by posting it on the original LabVIEW Idea Exchange.
  2. Browse by label or search in the LabVIEW FPGA Idea Exchange to see if your idea has previously been submitted. If your idea exists be sure to vote for the idea by giving it kudos to indicate your approval!
  3. If your idea has not been submitted click New Idea to submit a product idea to the LabVIEW FPGA Idea Exchange. Be sure to submit a separate post for each idea.
  4. Watch as the community gives your idea kudos and adds their input.
  5. As NI R&D considers the idea, they will change the idea status.
  6. Give kudos to other ideas that you would like to see in a future version of LabVIEW FPGA!
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