LabVIEW FPGA Idea Exchange

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A smaller (and cheaper) sbRIO based on the Xilinx Zynq chip. Target size is SO-DIMM form factor (68 x 30 mm (half the area of a credit card), 200 pins). Such a board  would be OEM friendly and can be plugged into a product (rather than the current sbRIO offerings that requires the product to be developed around the sbRIO rather than the sbRIO fitting into your product). Also, a Base Board that is (only) used during development. Below is what the proposed sbRIO and Base Board would roughly look like (courtesy of Enclustra FPGA Solutions)

mars_pm3_350.jpg       mars_pm3_350.jpg

  • HW Connectivity

NI has released an exciting new product with the High-Speed Serial board which is essentially a Kintex 7 with GTX transeivers exposed.

 

http://sine.ni.com/nips/cds/view/p/lang/en/nid/212693

http://sine.ni.com/nips/cds/view/p/lang/en/nid/212695

 

Some applications we are working on would benefit greatly from having some way to expose the GTP / GTX / GTH transceivers ont he various NI FPGA boards to enable high speed serial transmissions on a wider product palette.  Even the Virtex 5 supprts up to 16 GTP transceivers.  Having even 8 of these available for Aurora communication would be a complete game changer as we could move over to optical links between individual devices.

 

In order to be able to make proper use of this, NI needs to offer GTX / GTH / GTP options for many of their boards.  Imagine the power which could be unlocked by itnerfacing 8x Zynq 7010 boards with a single Kintex 7, each Zynq performing some aspect of pre-processing (Analog control, switching, some aspects of control) before sending results back to the Kintex 7..... For those of us working in Scientific areas, the prospects of a system like this is truly mouth-watering.

  • HW Connectivity

I would like to have a feature to access several IO pin ranges to avoid programming this for a 9205 cRIO module:

check.png

With DIO modules like NI9403 you can program this:

check2.png

Why not provide Mod2/AI0:31 in the above image? (With subranges like AI0:7, AI8:15,… similar to DIO module?)

 

  • HW Connectivity

Currently Measurement & Automation Explorer (MAX) only shows the following information for a typical R-Series card:

 

MAX-R-Series.png

 

It would be helpful to add a "Device Pinouts" tab that shows you all the pin assignments for your Analog and Digital IO:

 

MAX-R-Series-Device-Pinouts.png

 

  • HW Connectivity

Idea: New NI FPGA module with:

 

  • small FPGA (something which LabVIEW FPGA could already program Spartan 6 ...)
  • programmable by LabVIEW FPGA Module
  • IOs only
  • no CPU
  • DIP connector
  • One LED
  • Reset Button
  • Price under $100

Something like Papilio Pro.

 

Reason: As ATE manufacture sometimes we need small FPGA to do something inside ATE or ITA (interface test adaptor). To use sbRIO/myRIO is to big (complexity,price). Because we use TestStand and LabVIEW out knowledge of VHDL is small.

 

We could learn VHDL but after that we could stop to use LabVIEW FPGA! :-)

  • HW Connectivity

Please give Labview FPGA the ability to program any FPGA.

  • HW Connectivity

The latest Virtex-7 FPGAs have something like 20 times the computing power of the biggest FPGA supported by LabVIEW FPGA; it would be cool to be able to get those on a FlexRIO card.

 

Other companies make FPGA boards with up to 32 GB of RAM, the biggest FlexRIO has 512 MB; would be cool to have FlexRIO cards with RAM in the gigabytes.

On the cRIO-9068, the third serial port and the second Ethernet adapter is actually mounted on the FPGA, resources are consumed to redirect to realtime. Currently there are no access to this resource on the FPGA for developers, only from the Realtime.

 

I would like some I/O Nodes for interacting with these devices on the FPGA. NI could put up some examples how they could be used.

 

Today the resources are invisible to the developer, except for the additional long compile time and resources used (about 7%).

 

I attached pictures of the FPGA design and the resources consumed for a blank vi.

 

 

Sincerly,

Jens Eriksen

 

 

When you are using same code on different boards, it would be a big help if you could set the "FPGA VI Reference" indicator as "Adapt to source". When I use dirrerent DMA on different target, then the wire break every time I change target:

 

My FGV for the FPGA reference looks like:

 

FPGA ref Adapt to source.png

Currently the SMB Trigger is connected to the Real-Time controller to act as a DIO or drift correction for the RT clock. Some applications require sub-millisecond accuracy with the trigger which is not possible with the current configuration of the SMB trigger. This idea is to connect the SMB Trigger to the FPGA as a DIO line to achieve better accuracy.

-Ryan

  • HW Connectivity
0 Kudos

VBAT input voltage in VBAT Requirements of sbRIO-9651(SOM) should support less Voltage.

 

SPECIFICATIONS NI sbRIO-9651

http://www.ni.com/pdf/manuals/376962b.pdf

 

VBAT is for keeping the time on RTC.

Minimum of VBAT input voltage in specification is 2.875V.

In general, the button cell is used to keep time like a Mother board of PC.

For example, CR type Lithium button cell has Nomal voltage 3V and End-point voltage 2.0V.

In this case,  if we follow the specification, we can not use this CR type lithium button cell . Many users would like to use this CR type button cell for RTC. So, if we can chang the specification of Minimum VBAT voltage from 2.875V to less 2.0V, it is easy to use in many cases.

 

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  • HW Connectivity
0 Kudos

When an RMC is added in the project, the I/O is organized automatically in folders:

RMC.PNG

This is not the case when using an RMC Socket after creating a custom CLIP:

Socket.PNG

It would be really helpful if folders could be created to organize the I/O for an RMC Socket. 

 

0 Kudos

There needs to be a way to physically probe the FlexRIO card edge when a NI or custom module is installed.  A time honored method of debugging has always been to probe signals with an o-scope or logic analyzer.  To route debugging signals to unused pins (EX: Within a CLIP) for probing seems a necessity when dealing with hardware and FPGAs.

 

Lets get them to design one and make it into a purchasable accessory!

0 Kudos

It would be nice if we could use the Atlys board with the FPGA module. As far as i see not alot FPGA boards are suported besides the RIO FPGA boards. (only spartan3e xup) Since these are outdated could drivers be developped for some low cost none NI board ? Preferably the Altys ?

 

  • HW Connectivity