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Case structure FPGA Target

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Hello ,

i have a case structure in the Target VI and i want to control this case in the HOST VI !

 

How can i do this ? 

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Message 1 of 6
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Hi Myrza,

 

send the control data from your host to the FPGA target.

There are example projects coming with LabVIEW explaining such kind of stuff…

 

(Did I already mention those examples?)

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO
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Hello ,

Thank you,

Yes i tried to send the data with a FIFO ( Host to target )

But in the HOST side the fifo input is an 1D array , and in the Target side the fifo output is element !

I want to send just the number of the case (0,1,2,3) !

 

How will be the struture ?

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Message 3 of 6
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Hi Myrza,

 

what about using a simple control in the FPGA VI and access this control from your host (RT) VI?

Much easier than a FIFO here…

 

Again: there are example projects and VIs explaining all this!

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO
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Message 4 of 6
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I'am new woth labview FPGA and i tried with the example project but i didn't find what i'am looking for, 

 

can you please explain me how to use a simple control in the FPGA VI and access this control fromthe  host (RT) VI?

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Solution
Accepted by topic author MyrzaMBM

Hi Myrza,

 

Learn how to read and write FPGA controls/indicators from a host VI:

1. open LabVIEW.

2. Help menu -> Find examples.

3. Search for "fpga".

4. Select "Polling UI.lvproj" from the results.

5. Study the example.

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO
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