Hello everyone! I am currently trying to acquire acceleration data from a sweep using both the NI 9234 for an IEPE-sensor and the NI 9220 for an analog MEMS in a cRIO 9036. The data should simply be called on the FPGA side using the same FPGA I/O Node, put into an array and fed into a FIFO. Inititally the whole procedure seemed to be working fine but when take a more detailed look at the data i see a time drift between the two modules. They start at the same point but then show an increasing large difference before returning to no difference again. So when i multiply the time values of the NI 9220 with 10001/10000 i get a nice fit again. Unfortunately, I would like to solve this problem on the programming side instead of the data manipulation side. I've read these two articles: http://zone.ni.com/reference/en-XX/help/373197L-01/criodevicehelp/synchronizing_multiple_modules/ http://zone.ni.com/reference/en-XX/help/373197L-01/criodevicehelp/923x_understanding_loop_timing/ I understand that the NI 9220 has a (SAR) ADC and the 9234 has a delta-sigma ADC. I have specified the 9234 as the master timebase but the 9220 still uses the 40MHz onboard clock of the cRIO, correct? In the second article i posted above it is stated that: If the rate at which you can acquire data from the other module is as fast or faster than the data rate configured for the module with an internal master timebase, you can read from both modules in the same loop. If you use the same FPGA I/O Node to read data from all modules, the FPGA I/O Node does not return data for the other module until the module with an internal master timebase acquires data For the NI 9234 i have specified a data rate of 2048kS/s which is also the rate i see in my measurement files. The datasheet of the 9220 shows a sample rate of 100kS/s/channel which is much higher (i only use 3 channels at the moment but plan to use all 16). In the first article it is stated that i should create a seperate loop for each module with different data rates. So i should create a loop for the NI9220 and include a Loop Timer for 1/2048 s? Is that the only way? I understood it originally in the way that putting it on the same FPGA I/O Node would only be a problem if the NI 9220 had a slower data rate than the NI 9234. Thanks already for any answer! Lukas

Here are some pictures that will hopefully help you. In the the figure below, I have a SCTL that is counting pulses from one of my DSA Sample clock. The sample clock for the DSA runs at 12.8MHz. I am counting 16 cycles of this clock, such that I am generating an occurrence at 800kHz. (12.8MHz/16 = 800kHz) (Note I wanted my modules to run at different rates, but be synchronized.) I have another loop that has all of my DSA modules, see below. These modules are synced to the "Current" sample clock. They are running at a much lower rate than 800kHz. Next I have two loops for my SAR acquisition. Since I am acquiring data at a high rate, I am using the Sample Pulse method. For lower rates this is probably not needed. Note that the pulse that starts sampling for the SAR module are tied to the occurrence. You will need to do something similar for your application. Have a separate loop where the sampling waits until the occurrence. Note the delay is still needed, as there is a delay for each channel acquisition. Hope this helps. mcduff

LabVIEW

Synchronizing data acquisition with NI 9220 and 9234

Solved!

Glad you finally figured it out. I should have posted the VI much sooner, would have saved you a lot of headaches and time. Good luck with the FPGA, it can be frustrating at times, especially the long compile times.

cheers,

mcduff

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Hi, sorry for bothering you again.

I optimized the code a bit and now it's compiling and running fine.

EXCEPT: I ran into a problem with the FIFOs -.-' Could you maybe take a short look at the new forum post i created? I did not want to stretch this post here out to far...

https://forums.ni.com/t5/LabVIEW/FIFO-missing-data/td-p/3919792