Wire = variable..... or wire != variable...

[Ben]

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@Yamaeda wrote:

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@f. Schubert wrote:

But you can't access it from another place via the symbolic name (well, not at all in fact). The scope of this 'variable' is limited to the wire.

Felix

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True. It's closer to think of the Wire as the Symbolic name (of a variable), since you need the wire/name to perform any action on the data.

On the same note, the variable name isn't the data, it's a named reference, just like this, the wire, is a drawn reference ... or something. 🙂

/Y

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There is wisdom in that observation.

Aside from text vs graphic there is another difference thtat LV offers. LV is more interactive and the interaction between the programmer and the compiler is differenent in this sense.

In a text langauge I am compiling a set of ordered opertions in the order I want things done I am responsible for the buffers and I am expected to attend to the buffers needs (malloc etc).. In LV I don't give LV a n ordered list but more a check list of things I want accomplished. I tell it do this to this thie ( the wire) then do this and then that to that thing (the wire). I point at things I want operated on and LV records that itention with the wire connecting source and sink.

SO a diagram is a digramatic statement of what I want done with the wire showing how the data is t be processed. So wires record our request that may or may not result in buffers that can be named.

I humbly submit the following;

On the same note, the variable name isn't the data, it's a named reference, just like this, the wire, is a drawn reqest.

Nice obersavation /Y

Ben