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LABVIEW FPGA

Am facing problem in compiling a LabVIEW FPGA VI. 

I am getting the following error:

 

You cannot run this VI because the target resource does not match the actual type of the device.

 

Can anybody help me out of it to fix the error and get the solution.

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Message 1 of 10
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Am facing problem in compiling a LabVIEW FPGA VI. 

I am getting the following error:

 

You cannot run this VI because the target resource does not match the actual type of the device.

 

Can anybody help me out of it to fix the error and get the solution.

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Message 2 of 10
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Need to see the code, including the project.


GCentral
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Message 3 of 10
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M@k31 wrote:

Am facing problem in compiling a LabVIEW FPGA VI. 

I am getting the following error:

 "You cannot run this VI because the target resource does not match the actual type of the device" 

 

Hi M@k31, You can try out the following methods:

 

  1. A wrong version of LabVIEW is opened where FPGA target is not supported
  2. The corresponding FPGA Target is not supported by the CLIP chosen, because of any functionalities in your target VI
  3. Or, the BITFILE loaded does not belong to the target specified in project

Please, share your experience after trying above methods.. Smiley Very Happy 

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Message 4 of 10
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Actually the FPGA VI was developed in LabVIEW 11.0 version and then we have updated software of NI PXIe-1075 chasis.
and upgraded it to LabVIEW 16.0 since that time I am facing problem in compiling my VI as the target resource did not match the type of device
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Message 5 of 10
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So how to set the right target

as I am getting N number of errors even after compiling it again regarding invoke methods and all

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Message 6 of 10
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Sorry sir its confidential I wont be able to share it

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Message 7 of 10
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That limits the amount of help that can be provided via forum.

Maybe a cleaned up version of the project could be shared?

 

Did it compile in LV 2011?

I suggest removing parts until it compiles and then adding parts back in until it fails.

 

In the off chance, are you trying to use DBL datatype?

 

Besides LabVIEW version, could we know FPGA target and other info that are probably not confidential?

 

Some friendly feedback: subject could be more descriptive to draw in more people to help you out


Certified LabVIEW Architect, Certified Professional Instructor
ALE Consultants

Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
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Message 8 of 10
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Hello Terry_ALE,

 

Would you mind helping me in this, SERDES CLIP in External clock data Acquisition in Flex RIO.

 

There is no reply since, I posted.. I tried both in Software and Hardware groups!!

Smiley Sad

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Message 9 of 10
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Was there any improvement?!

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Message 10 of 10
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