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wait on edge timeout rio

Hello,

 

I'm working in development mode emulating a 7841R target. Trying to set up a function that waits on a digital line to change I noticed, that the "wait on..." functions always returns immediately. This is probably due to the undefined or arbitrary input state.

Then I set up a test bench vi to simulate i/o. I added an i/o item name case and cases for every node or element type. But the VI doesn't seem to be called when I run my emulation code (however the run arrow does change to some sort of "ready" or "waiting"). Setting probes inside the simulation i/o I cannot observe any execution.

 

What am I doing wrong?

 

Kind regards,

\Ulli.

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Hello Ulli,


Find attached a link to a tutorial about Efficient Development and Debugging with LabVIEW FPGA.

 

Efficient Development and Debugging with LabVIEW FPGA
http://zone.ni.com/devzone/cda/tut/p/id/7445

Search in the LabVIEW Help for the following topics, you’ll find a detailed description about the debugging technique on a FPGA

 

-Debugging FPGA VIs on a Development Computer
-Creating Test Benches to Debug and Test FPGA Vis
-Tutorial: Creating Test Benches

 

Kind Regards

Ulrich

AE NI-CER

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