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multicore performance

I have an application developed in LV8.0 where the daq is very time critical and there is a read with 2 slave loops running very fast (HSDIO read as fast as it can go).  The three loops are balanced and ran fine with 2 3.8Ghz processor system under XP.  The client upgraded the hardware to use 2 core duo 2.8Ghz processors and the code is having timing issues as if it is running slower on the new system.  Is this possible, does LV 8.0 not use multicore at all?  Will recompiling with 8.5 help or is there some other hardware issue that could be happening?
 
Paul
Paul Falkenstein
Coleman Technologies Inc.
CLA, CPI, AIA-Vision
Labview 4.0- 2013, RT, Vision, FPGA
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Labview allways uses multicore. But the program must have the right architecture, so Labview can use it.
I don't think think recompiling will help, unless you will use some new features of Labview 8.5 to take advantage of dual core. This means program changes.
 
My opinion is that moving from single core 3.7GHz to Dual core 2.8GHz is NOT much of an upgrade (at least for my standards).
My new dual core PC does not run as fast as expected. I think the communication between the two cores is not very good, at least for now.
They are moments that is even slower from my old (really old) PC.
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I would be interesting in what others think about multicore...
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threadconf lets you spec how many threads for each execution system.

The LV 8.5 timed loop lets to specify which core the loop runs in.

Without loking at the code, that all I can say for now (but you knew that).

Ben

Retired Senior Automation Systems Architect with Data Science Automation LabVIEW Champion Knight of NI and Prepper LinkedIn Profile YouTube Channel
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After more trouble shooting it appears that the multicore is not the issue but for some reason the pci card is running slightly slower.  It is a HSDIO where I am streaming data data out at 5MHs and in 5Mhz doing lots of realtime processing data storage and many other stuff upto 3 parallel loops are running and synchronized with good locking techniques.  The issue is that when I do a DO write with 5MB of data it is actually taking more time than on the older system.  Very starnge.  There bus does not have other cards on it but is still running slower than the previous system.  What factors will effect the data transfer over pci from the HSDIO card?  The code works when we dont run at max DO write size, but I cant hit the maximum speeds of the older system.  Very strange.

 

Paul

Paul Falkenstein
Coleman Technologies Inc.
CLA, CPI, AIA-Vision
Labview 4.0- 2013, RT, Vision, FPGA
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Almost sounds like it is doing programmed I/O rather than DMA. If you had more than one slot I'd recomend trying another.

I'd call support and ask them ow to verify the board is using DMA.

Ben

Retired Senior Automation Systems Architect with Data Science Automation LabVIEW Champion Knight of NI and Prepper LinkedIn Profile YouTube Channel
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Thanks I will try that.  Could changing PCI slots Help?
Paul Falkenstein
Coleman Technologies Inc.
CLA, CPI, AIA-Vision
Labview 4.0- 2013, RT, Vision, FPGA
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You are pushing my KB but I think the answer is "depends". I THINK there have to be DMA channels available and/or Bus-Mastering.
 
Give it a shot!
 
Ben
Retired Senior Automation Systems Architect with Data Science Automation LabVIEW Champion Knight of NI and Prepper LinkedIn Profile YouTube Channel
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a comment based on personal experience:
i use often a 6533 card. not HSDIO, but should run at 2MHz.
the thing is that it does on some computers, and doesnt on others. there doesnt seem to be correlation with the computer generation as long as it is a P4 above 2GHz (didnt try on slower ones). but effectively on all dual cores i have tested, it runs slower than on single core computers. have no idea why. never really investigated, so there might be other environmental factors.
But when i look at the CPU usage, both CPUs are used during operation, at a ratio of 70/30 %. So it looks LV takes advantage of the dual core, but it doesnt translate to the card.
 
BTW, if you do not need timed operation, you can rather use Burst timing method. it insures the specified overall rate, but not the frequency (frequency varies in function of the system load, and it can go much slower for some periods of time - up to several ms).
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... And here's where I keep assorted lengths of wires...
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falkpl wrote:
The three loops are balanced and ran fine with 2 3.8Ghz processor system under XP.  The client upgraded the hardware to use 2 core duo 2.8Ghz processors and the code is having timing issues as if it is running slower on the new system. 
Just a side note: GHz is a poor indicator of performance. A 2.8GHz Core 2 duo system running on only one single core is most likely still significantly faster than e.g. a 3.8Ghz P4. 😉
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