fpga

[snason]

Hello all,

I am using LabVIEW 2010 to run a Single Board - RIO 9602.  My goal is to read a set of 12 data values from an IMU via SPI, then log that data accurately by byte onto an OpenLog using a serial data stream, and then convert the data recorded by the OpenLog back to its floating point representation in an excel file.  I have written test programs that run on the FPGA that accurately read all of the IMU data and display it on the desktop, run on the FPGA that log sample IMU data accurately to the OpenLog, and run on the desktop that convert the text files to excel spreadsheets of data.  All three programs work flawlessly individually.  However, when I combine the two programs that run on the FPGA and make the necessary adjustments for them to work together, the first few values get recorded correctly until the recording suddenly stops (sometimes in the middle of sending a value) and 0s are recorded for the remaining values in that line.  Then, on the next iteration when it should be recording a new set of 12 values, the OpenLog records from the point it left off of during the previous iteration (resulting in an obviously incorrect value) with the remaining positions in the set filled by 0s (see 07252013_161119.csv for an example of a flawed excel file). Since the OpenLog has no trouble recording sample data at the same rate that it gets sent actual data, it appears to be an issue from within the FPGA and its ability to handle the reading and recording processes all at once.  I then tried adding a delay of 2.5 seconds between each loop iteration, and the resultant recording was much less erroneous, but still had some values cut off followed by incorrect values (see 07252013_161122.csv for an example of this improved excel file).  This would suffice, however I am hoping to record a set of IMU data at a rate of at least 1 sample per second, and setting a delay such that there is only one sample per second results in a very erroneous recording.   FPGA Main.vi is the code being used to perform these tasks.

My question with this context is, is it possible that the FPGA is glitching from being overloaded with a program designed to handle SPI communication with the IMU and recording data to the OpenLog at the same time?  Is there a possible solution if this does happen to be the issue?

Thanks for your help,

Sam