03-12-2010 08:42 AM
Hi,
I am trying to use ni cRIO with chassis cRIO 9103 in scan mode to detect frequency of motor. There is a built in example as cRIO IO scan.lvproj which could be used. I read in one place that there are only certain slots where pfi lines of scan engine clock could be detected. In order to use this vi I am uncertain which input in my 4 slot cRIO could be used.
Also is it possible to use both FPGA and scan mode under same project. If so, please give some instructions. I am really stuck- I tried also to transfer code from examples to my project but this gives error even when i use instructions from ni.com/info which appears on entring code fpgaex. First when i click chassis>>add FPGA target. It would try to put whole project from scan mode to fpga mode. Even when I try to build new project and try to move code using instructions the code doesn't paste under target.
I hope there are solutions to these problems. Please help me.
Many thanks in advance for help
Best regards
03-12-2010 10:28 AM
Hi,
I had some success in measuring frequency, please see the attached quote. Now when I try to save it in tdms as per code, I get error1013. I looked in site, I guess this is due to file not written in host computer.
I wonder what is the best way to write this file into host computer, if this is the problem for error 1013.
Secondly, what is the frequency upto which I could use scan mode and what is the implication of loop execution rate on these results.
Many thanks for help
Cheers
03-12-2010 10:30 AM
Sorry forgot to attach code. Please find attached
03-15-2010 01:09 PM
Hello kwaris,
I would like to confirm that it is possible to run a cRIO in both Scan Mode and FPGA mode. However, a single module can be used in either Scan Mode, or FPGA Mode, but not both simulataneously. Once you have configured your project, a new bitfile will be compiled.
The following document shows the Project Explorer with both Scan Mode and an FPGA target:
Using NI CompactRIO Scan Mode with NI LabVIEW Software
The following Knowledgebase article explain how to add an FPGA target to an existing Scan Mode project
Using Scan Engine and FPGA Simultaneously on a CompactRIO
Error 1013 which you have seen can sometimes appear when working with cRIO targets. It is usually cause when you have opened the cRIO VI outside of the Project Explorer, or not saved the VI. Ensure that the VI has been opened from the Project Explorer, and that you have clicked 'Save'.
Regards,
03-15-2010 05:37 PM
Thanks mate,
I needed to get to some results quickly so I redesigned the project in FPGA only. FPGA is bit more programming but I got it end of the day.
I wonder if FPGA is better in terms of sampling the data why anybody would still want to use scan mode? Is it only because it's easier and quicker to program.
Also I would like to check the accuracy of following assumptions I'd made in designing signal period calculator.
I dont have labview right now so I did it in powerpoint, hope its easy to follow.
1) 2nd FPGA read/write function ( with inputs configured as write) is outputting period of ni module (where the signal is wired)
2) By dividing this period with 40Mhz clock frequency, we effectively multiplying period of fpga with period of ni module to get period of signal. This is true and it obeys NiQuist criteria. ( sampling frequency must be at least twice the frequency of sampled signal)
Thanks for patience, and many thanks for help
Cheers
03-16-2010 09:05 AM
The attached code might make more sense. This is to calculate frequency and period of signal on crio module.
In fpga vi, I am comparing previous and present values of input, if present is greater, I am calculating the time interval between two rising edges.
Unfortunately, I am not getting the frequency I have set it on my waveform generator. Also reading on indicators is fluctuating very fast. Any ideas to get useful result.
Best Regards
03-19-2010 10:00 AM
Hello Kwaris,
Scan Mode has been an option as of LabVIEW 8.6.1 Originally, RIO-based platforms could only be programmed in what is now called FPGA mode. Scan Mode allows users to use a cRIO for the most common tasks without having to compile their own bitfile. However, FPGA mode allows users to program their own custom code, exercising the complete capabilities of the cRIO.
Regards,