Set Fixed Array Size

[cwms]

Hello. I am trying to develop a VI for an FPGA target and I'm trying to make it so whoever is using the VI can specify the size of an input array when they instantiate it (such as by having an input to the VI that says "max array size" or something). So far it seems like the only way to do something like this is to go into the VI itself and manually set the array size for each input array for the VI (i.e. open the VI, right click on each input array, select "Set Dimension SIze", choose "fixed", set number of elements). I'd like to have one point where I can set the size of all the arrays at once (since in my case they are all the same size), and let the person using the VI set it to the proper size for whatever application they are using it for (to be clear, let's say I have two uses for this VI, and in one case I have an input array of size 100 and in anohter use of size 1000, I'd like to be able to set these somehow instead of doing it through the dialog). Thanks.

[Dragis]

Unfortunately, per-call configuration of array size is not something that is supported today. This is a great idea, I would suggest that you post it on the FPGA Idea Exchange so we can get a feel for how many other people need this same feature.

[nathand · Accepted solution]

It's a bit more work, but this might be a good use case for a memory block on the FPGA.  Make it larger than you expect you'll need and then store the actual number of elements somewhere.  This will let you vary the amount of data without consuming large amounts of FPGA resources on an unnecessarily large array.

[cwms]

Thanks, after thinking about it a bit more, that was the path I decided to take.