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Problem with case structure inside control & simulation loop

I'm facing something strange in labVIEW. I'm trying to read some bytes from serial port at every iteration of a simulation of a dynamical plant. I've put a case structure inside the simulation and control loop (the black bordered loop) in order to handle byte reading operations.

 

The strange part is that I've manually set the case structure in to the "false" case, but labview encounters a run-time error in the "true" case!

 

Block Diagram

 

 

When I run this simulation there is no bytes available in the serial port and I have designed the case structures in order not to read any bytes when there is not adequate bytes. Beside that The case structure is always false, but after running simulation the "Unflatten from string" block sends out an error saying that the data structure is corrupt, where this block should not run at all!

 

This problem only happens when I use control and simulation loop and everything is fine when I use the same blocks in a simple while loop.

Also the error appears just two times! Once in the very first iteration of the simulation and the other one at the end of simulation.

 

Any help is heavily appreciated

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Hello Citrizin,

 

The behavior you have described is, in fact, expected and intended when using a case structure inside a simulation loop.  The reason for this is that dynamic function blocks must be initialized and unloaded at the same time the simulation begins; in order to do this the entire loop must be evaluated, including all sub-diagrams (case structures) - This occurs even if dynamic blocks are not being used.

 

If you'd like to use a case structure in this fashion, it is possible to build the structure into a non-subsystem subVI that is called for each major solver step.

 

Hope that helps!

 

Regards,

 

 

 

Tom L.
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Thanks for your answer,

By the way I wired the "error in" and "error out" ports of "Flaten from string" to a constant and an indicator repectively and now the problem is solved.

I can't figure out why there is no more error in this new fashion if it was intended to produce errors.

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Hi Citzrin,

 

By wiring the error in and out for the function in question, you are overriding the automatic error handling that causes the pop-up you were seeing previously.  Depending on how you have wired the function, what tunnel methods you're using, and where the indicator is placed, you may also only be reporting the "last value" to the indicator, which will functionally ignore any errors unless they occur in all but the last step or iteration of the simulation loop.  Additionally, the case structures in question will still only return one value - the other cases are evaluated/initialized, but the values returned by the case structure will be those generated within the "selected" case.

 

Also, be sure not to place any terminals inside case structures within your timed loop as per this help document:

 

LabVIEW Help: Block diagram terminals are not allowed inside Case structures on simulation diagrams

http://zone.ni.com/reference/en-XX/help/371894G-01/lvcdsimshrd/edfpterminsidestructonsimdiag/

 

Regards,

Tom L.
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@citrizin wrote:

Thanks for your answer,

By the way I wired the "error in" and "error out" ports of "Flaten from string" to a constant and an indicator repectively and now the problem is solved.

I can't figure out why there is no more error in this new fashion if it was intended to produce errors.


My guess is that you've effectively swallowed the error.  I think it's still there.

IMHO, from what I can see of your code, you have a lack of basic LabVIEW concepts such as data flow and error handling.  I would advise you to take a look at this this tutorial.

Bill
CLD
(Mid-Level minion.)
My support system ensures that I don't look totally incompetent.
Proud to say that I've progressed beyond knowing just enough to be dangerous. I now know enough to know that I have no clue about anything at all.
Humble author of the CLAD Nugget.
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Message 5 of 6
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Thanks for ur answers guys

BTW you may a set break point inside the case structure (for the case that error occurs) and see that this state never happens by a simplie error in and out wiring.

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