NI USB-8451 SPI clock release

[johnmountney]

Is it possible to release the SPI clock signal so it reamins high immediately after sending data on the SDO line? Currently, SCLK is held low for a significant period of time after transmission of the final data bit before it is released to a logic high state. Is there a way to configure this? Is there also a way to configure DIO signals independent of the SPI using scripting?

[JoeySpinella]

Hi John,

I believe you are referring to the clock polarity and phase.

Where Can I Find More Information About the SPI Clock in a USB-8451?

http://digital.ni.com/public.nsf/allkb/4FB0A184E545AC1586257609007537EF?OpenDocument 

The information is found here in the NI-845x Hardware and Software Manual:

https://www.ni.com/docs/en-US/bundle/ni-845x-hw-dsw-getting-started/resource/371746e.pdf

Additionally, beyond using SPI scripting, we can use the basic SPI and basic DIO examples installed with the 845x driver in Help > Find Examples.