04-06-2014 11:45 AM
This seems to be my week end for dumb problems. Here is another one. I built this loop to run on an FPGA. For some reason it will not run. Can anyone see an obvious reason for that?
Solved! Go to Solution.
04-06-2014 02:25 PM
04-06-2014 02:48 PM
Here it is in 8.5.
04-06-2014 02:51 PM
Make absolutley sure the global STOP is false before the loop runs. Personally, i never want to stop FPGA loops so i always wire a constant. If Digital Data is ever FALSE you will be stuck forever as the inner while loop relies on the global stop or what appears to be a shift register comparing to >100, but you never increment the value. I hope this helps, one of these is probably the issue.
Michael.
04-06-2014 02:56 PM
04-06-2014 03:11 PM
Michael78,
Of course you are right. The loop in the Digital Data On/Off false case never gets incremented and so never finishes. This is kind of screwy code and I'm now thinking a complete restart is in order.
Now I get to wait 3 more hours of compiling to find out if it works.
Thanks
04-06-2014 09:29 PM
No, you can run your fpga code in simulation mode (just go and right click on fpga module in your project, there is a option of running vi , select the simulation on development PC option, i am not remembering the correct phrase but you can pick from the hint i given. but then you must shift your RT vi to the 'Computer ' option in your project.
by this you can run your fpga code to get its logic checked without going into the lengthy compilation process. after finalizing your code check out the sim option and shift back your vi to RT cont option.