Core 1 page 9-4: "...pass data between parallel block diagrams..."

[chrisking]

 "...if you use wires to pass data between parallel block diagrams..." Can that be done?

Do they mean pass data between parallel loops/structures?

[RavensFan]

You can pass data between different subVI's by way of wires.  So if you say each subVI is a block diagram, then yes, semantically  you are doing that.

Without seeing the book, I would assume they are talking about parallel loop/structures.

But either way, whether subVI's or loops and structures, if a wire is going from one to another, they are no longer in parallel.  They are sequential since the beginning of one is waiting on the completion of the other.

[Ben]

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@Ravens Fan wrote:

You can pass data between different subVI's by way of wires.  So if you say each subVI is a block diagram, then yes, semantically  you are doing that.

Without seeing the book, I would assume they are talking about parallel loop/structures.

But either way, whether subVI's or loops and structures, if a wire is going from one to another, they are no longer in parallel.  They are sequential since the beginning of one is waiting on the completion of the other.

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please excuse my while I split wires hairs.

Two multi-frame flat seq structures could have wires from one to the other and be in parallel.

Example:

(2) three frame strcutures are on the diagram.

A constant in frame one of the top loop could feed and indicator in the second frame of the bottom.

Similarly, a value rom the first frame of the second could feed an indicator in the second frame of the top loop.

Done splitting hairs.

I agree wires generally force an order and queues AE's or other method must be moved to move the data bewen them if they are both running at the same time.

Did I just take to long to post this hair splitting?

Ben

[richjoh]

In case of flat sequence, that would be parallel till the frame where the wire goes from one to the next. Or would it, guess the compiler would decide. So I'd have to say it can't be done (wiring parallel loops) and call it parallel or parallelism.

[chrisking]

The main question concerned using wires to pass data between block diagrams. Unless you know of a way to do this, I think this is an error in wording.

[richjoh · Accepted solution]

The question is a contradition. Using wires is not parallel. Two unconnected loops is possibly parallel. Without us reading your contents it a guessing game on the phrase of your thread. Maybe if you go into more detail.

[cadiz1]

Core 1 pages 4- 28

I have noted what  I think are  mistakes. Please can someone verify. Thanks.

1.Figure 4-14  Min Temp >=  Max Temp When  translated to code   in figure  4- 16     > is used.  In which case  if the  say  Max and min temp  are  = to 0 then Heatstroke  is output. This  is  wrong.

2. The Flow  chart  does not correspond to the  code.

  In  the second  decision(Test)    Current  Temp >=   Max temp   Yes . Then  Output Heatstroke warning and True.  

discrepency-   In the code  the   3rd decision(test) is  executed . This  is  not  how  the  Flowchart  is depicting it .

I know  these to be  small  details . I have  found further  discrepencies. On page 4- 40

Can  some  verify?

[BenDAE]

I have shared your concerns with our customer education group. They will look into this and you can expect an update soon.