200560 timeout error using DAQmx

[VI_Joe]

I had 2 separate DAQmx tasks working concurrently on the same block diagram.  The two tasks were not triggered, but both were starting at roughly the same time, give or take a few samples.

Next, I wanted to clean up my work and make 2 separate sub VI's from the 2 tasks on my block diagram.  So I coppied on block of code to a new VI and deleted that block of code from the original block diagram.  Now, the task onr the original block diagram gets error 200560 when I try to run it.  Specifically, the error message reads: "200560 occurred at DAQmx Wait Until Done.vi.  Possible reason - Measurements: Wait Until Done did not indicate that the task was done within the specified timeout".  The timeout was set for 10s.

I replaced the block of code for the task that was moved and everything ran fine as before. 

When I single-stepped through the code, I noticed that the second task started before the first task was done.  This led me to suspect some sort of timing issue.  I tried to induce a wait state by inserting a for loop with a 500 ms delay, but it did no good.

Any ideas?

[RavensFan]

What tasks are you trying to do in each DAQmx task?  Please post your VI.  Even if we don't have your DAQ hardware, we might be able to see by the way they are configured or how they are wired what is happening.

[VI_Joe]

For my application, I'm trying to energize a solenoid coil with a 12V pulse, while at the same time, making an acceleration measurement.  I'm generating the 12V pulse with the 9472 in slot 4 of the compact daq chassis.  I'm making the acceleration measurement with the 9233 in slot 1. 

If you look at the attached VI, write pulse with internal counter_12_11_08.vi, you will see code for the pulse generation at the top of the block diagram and code for the acceleration measurement at the bottem.  If I delete the code for the acceleration measurement, the code for the pulse generation hangs up.

[John_P1]

Hi VI Joe,

The 9472 is a correlated digital I/O module, which means that it can do hardwared-timed I/O in slots 1-4 but it must receive its sample clock from another source.  The source you are using in your code is cDAQ1/ai/SampleClock.  So, when you have the analog input task running, you are able to use the correlated digital I/O (which is based off the analog input sample clock).  When the analog input task is not running, the correlated module no longer is receiving a sample clock.

You don't have to use the analog input sample clock (although it is convenient since you are already using an analog input task).  One good possibility would be to use a dummy counter task to generate a clock--you could use the internal counter output as the sample clock for your correlated I/O.  You could also use an external clock if you have a digital I/O module in slot 5 or 6 of your chassis (giving you access to the PFI lines).  

[VI_Joe]

John,

I'm going to confess my ignorance on the timing/clock topics in your reply to my question.  How can I educate myself?  Is there an NI site that I can go to for help?

Thanks for your attemp in helping.

- VI Joe

[John_P1]

Hi VI Joe,

The best documentation is probably in the cDAQ-9172 User Guide and Specifications, starting on page 35.  Also, here is a list of C Series Modules that indicates which modules support correlated digital I/O.

I would avoid running the two tasks in seperate sub-vis.  If you wish you can configure them in sub-vis, but you probably want both tasks to be running at the same time.  If you convert each half of your code into a sub-vi, only one half will execute at a time.

-John 

[VI_Joe]

Thanks John.

I appreciate your help.