Example with xilinx IP blocks

[Leonardo_Castillo]

Hi

I search more example that use Xilinx IP blocks.

thanks

Leo

[Victor.F]

Hello

The easiest and fastest way of integrating a Xilinx IP in LV Communications is using an already existing IP Node among those

Xilinx CORE Generator IP Nodes

http://www.ni.com/documentation/en/labview-comms/1.0/cdl-node-ref/xilinx-nodes/ 

You can find an example on how to use those guys under:

File>Examples>Programming FPGAs>Clock Driven Logic>Xilinx IP FIR

Open the FPGA.gvi, you'll see in there an IP Node integrating the Xilinx IP.

You can find all the IPs under the Xilinx IP palette:

Once placed on the diagram select that particular IP Node and click the Configure Xilinx IP button in the Ribbon to see the
detailed configuration information of the function.

After doing so, you'll have to understand how to interface with your particular IP, for that, please refer to Xilinx documentations.

If for some reason you have to integrate a third party IP not available there, then please follow that talk where we discuss how to do so:

https://forums.ni.com/t5/LabVIEW-Communications-System/VHDL-code-integration/td-p/3091472

Let us know if you can go ahead, and what you're trying to achieve with this.

Bye

Regards

[Leonardo_Castillo]

Thank Victor

regards

Leo