Hello,
I'm trying to compile a simulink model to a DLL for use on a veristand system. I've been able to do this before but have since updated my computer system and now it doesn't make it through the build process.
I'm getting the following error message...
"Error: NI VeriStand Error: Invalid character in: 'c7_vat_development_2018_update/Trans Output Simulation/', exiting code generation. The name cannot start or end with / character.
Component: Simulink | Category: Block error"
It looks like it has an issue with the / at the end of the Trans Output Simulation, which is a block in the simulink model. However the / doesn't actually exist! In the naming convention above it just represents the model hierarchy! Is this a known or common issue?
Thanks