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NI TimeSync: FPGA Timekeeper Getting Started

FPGA Timekeeper (Labs):  FPGA Timekeeper

Description:  The FPGA Timekeeper API is a set of VIs that allow you to synchronize absolute time on your FPGA target.  This labs release includes a LVLIB that contains these VIs, as well as several example projects and documentation.

Software Requirements:

The FPGA Timekeeper API requires the following software components:

  • LabVIEW 2010 or later
  • LabVIEW 2010 FPGA Module or later

The FPGA Timekeeper examples also require the following additional software components:

  • LabVIEW 2010 Real-Time Module or alter
  • NI-RIO 12.0

Installation Instructions:

  1. Download and unzip FPGA Timekeeper
  2. Open FPGA Timekeeper.lvlib

You can browse the example projects to see examples of how to use the FPGA Timekeeper. There is also additional help found under the Documentation folder in the unzipped location.

Jeremy L.
National Instruments
Message 1 of 8

What is output by the FPGA Timekeeper.lvlib:Get if the unit is indoors and never sees a PPS signal?

Ryan Vallieu CLA, CLED
Senior Systems Analyst II
NASA Ames Research Center
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Message 2 of 8



I'm sorry your question was not answered before now. If the Timekeeper is never synchronized to a source, it will simply return the time in ns since the VI started. (It's basically just a counter that starts at 0 and counts upwards).

Ty Prather
Technical Marketing Specialist
National Instruments
Message 3 of 8

What are the measurement units of "UTC offset" property and "offset from time reference" from FPGA Timekeeper.lvlib:Get

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Message 4 of 8

Is there any documentation of the algorithm used in the timekeeper VIs? If yes, is it published anywhere or can it be so that it can be referenced?

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Message 5 of 8

Hello jtagg82,


As far as I know, there is no public information about the specific algorithm. if you need that information I would recommend contacting customer support, so they can create an escalation with R&D to study the particular scenery and decide what would the most beneficial for both parties. Is important to understand that there are details about what you could expect from the algorithm, that in most cases should be enough to cover your documentation requirements. I am aware that some very specific applications require having the algorithm specific information, but it would require an investigation. I handle a similar case a few years ago, if you want more details, please send me a private message. 

Randy @Rscd27@
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Message 6 of 8



I've got a project that is using Timekeepr for years.

I had to change computer and reinstall the my LabVIEW setup. Opening the FPGA code of my projetc it says that it connaot run because 'epoch offset adjustment' and 'time rate adjsutement' are broken.

As the code is protected using a password I cannot see what is really broken inside.


Any help ?


Drivers installed on my machine (Win7 x64) are in the HTML report attached.




CLA, CTA, LV Champion
View Cyril Gambini's profile on LinkedIn
This post is made under CC BY 4.0 DEED licensing
Message 7 of 8

Has anyone ever tried to use this on an FPGA that doesn't have a 40 MHz clock? When I try to compile the FPGA code, I get the following error.

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Message 8 of 8