High speed communication between the FPGA and the real-time-system on a CRIO

[MrDE]

Hallo,

At our university we want to implement new algorithms to control at a very low level the generation of a 3 phase AC voltage for a synchronous motor.

As for the first development steps we do not want to put our algorithms directly into a FPGA we wonder if it could be possible to hold major parts of the algorithm in the RT. The whole system should run at 10 kHz.

Do you think the RT part of our system (actually CRIO 9022) could manage this. Some additional resources are also needed to realize the interface with the host PC (debugging purposes, parameter control).

Do you think it would be a better idea to use directly a high end CRIO 9082, or do you even think it is necessary to change completely the architecture and switch over to a PXI system.

Thanks for help

MrDE

[Ryan-OC]

Hi MrDE,

I think everything depends on how accuratly you want your timing to be. 10kHz is pretty close to the limit for timing accuracy and precision you'll get from software timing  (which is what the RT controller uses) especially if you are using a 9022. A 9082 will be better because the controller has a better onbaord processor. You could use the FPGA to generate and export a time base for the controller to use. A PXI system would definitely work but might be overkill. I'd try to generate a clock from the FPGA. 

https://decibel.ni.com/content/docs/DOC-22548

http://digital.ni.com/public.nsf/allkb/0892C8D55C6D0C0E86257585004FD0B0

https://decibel.ni.com/content/docs/DOC-11079

Let me know if this is helpful.

[Pie566942.0]

MrDE,

A basic cRIO CPU could run time critical process "A" at 10KHz with measurable release and complete jitter.  That jitter might be within your specifications.  A high end cRIO could choke on time critical process "B" at 1KHz.  While it's true the 9022 has a 533 MHz Freescale MPC8347 real-time CPU and the 9082 has a 1.33 GHz dual-core Intel Core i7 CPU, those specifications do not preclude or imply success with any algorithm.  Given identical source code implementations of your algorithm, there's no guarantee (granted, it's a bet I'd take) the 9082 will outperform the 9022.  There are many set-in-stone and configurable differences between these two targets.  There's also a very respectable 800MHz Freescale CPU-based cRIO that keeps you on VxWorks instead of WES7 OS that has proven itself in medium-to-large scale IA applications.  I assert that the question, 'can the cRIO 90xx handle my 10KHz algorithm?' can't be answered without more information about the algorithm and other requirements.  It's like asking, 'Can this particular suitcase hold all of my stuff for my upcoming trip?'  Also, why don't you want to implement the algorithm on the FPGA?  That strikes me as a strange constraint, especially for high-speed closed-loop motor control.

-Steve K

[azeem786]

Hi Ryan,
I would like to know is it possible to run both scan-mode and FPGA-mode in a project simultaneously using NI cRIO-9076 chassis?  I mean some part of the project run in Scan Mode where else rest will be in FPGA Mode. Please advice. Thanks.

Regards,

Azeem

[MCOTO]

Hello Azeem,

Yes, It is possible. This is called "Hybrid Mode" and there are some considerations to take before implementing this solution. Please take a look to the next link.

Regards,

MCOTO

[nitr]

Sir,

 I want to work in crio.bt though i have materials yet i am unable to get it completely. i want to see how a real world analog signal can be analysed with crio. kindly suggest me some steps..

thanking you

[MrDE]

Hi Pie566942.0

Thanks for the answer. Today we got a 9082. The algorithm isn't finished yet, but we want to implement it in the RT at first for better debugging. The next step will be to implement it in the FPGA.
We will write if it works or not with a 9082.

MrDE

[MrDE]

Hi Ryan-AE

Thanks for the answer. Today we got a NI-9082.
We will write if it works with the new cRIO.

MrDE