FPGA gating

[zeniasn]

Hi,

I am using the cRIO 9155, module 9401 to create a correlation program for my research. I am trying to output a gating signal from the 9401 module using the derived clocks on the FPGA board. This signal will output into an external single photon counter. Can you help me understand how to output the clock signal through the 9401? 

Also, we do have the module 9220, howvever, we are using module 9401 because it is faster.

Thanks,

Zenia

[BFeigum]

With your current hardware, you will not be able to directly output your FPGA clock signal.

According to the 9401 datasheet, the maximum output frequency with only 2 output channels enabled is 20Mhz (at a maximum load current of 1ma), so you may be able to output a 20 Mhz clock from your FPGA. You can write a simple FPGA program that will toggle the digital output channel by first feeding either a TRUE or FALSE boolean and then on every clock cycle, feed it the NOT of the last signal. 

You will need to make sure you do not exceed 20 Mhz when writing to this module. You will likely need to derive a clock from your master clock and time this loop with it.

[zeniasn]

Thanks for the reply. I actually made a mistake in the post. We are using 9402 instead of 9220. Could I output a clock signal from the 9402?

Thanks

Zenia

[BFeigum]

The 9402 is still limited to 20MHz so my previous post will still apply to that card.

[zeniasn]

Thanks again.