-61055 while generating Intermediate Files (LabVIEW FPGA)

[benjamin-hinrichs]

I'm facing unexpected behaviour when attempting to compile an FPGA (on LabVIEW version 18.0.1f4 (32 bits), FPGA module 18.0.0) .

I'm using a global variable (U16 Enum) to switch between different communication protocols at run-time in some custom FPGA code and that compiles and works fine (although compilation takes 5h).

Because currently I only need one protocol I wanted to improve compile time by using an enum constant instead of a global variable, however making this one change breaks the intermediate file generation with this error:

An internal software error in the LabVIEW FPGA Module has occurred while generating code. Please contact National Instruments technical support at ni.com/support.
Exception 61055 at: v\source\FPGA\CodeGenerator.cpp:350 - LVExcept. Err=1, File=ransforms\ArraySizeResolver.cpp, Line=1922, Detail='Nodes with unresolved array sizes: VI=Convert Valve_C

I searched the forums and error 61055 turns up once, but it's unrelated. I've tried removing the global variable entirely. I couldn't find array allocations dependent on this enum. What is really strange in my situation is that the enum constant should make array sizes more specific than a global variable, but the error message above would indicate the opposite.

Has anyone stumbled on something similar?

Unfortunately I am forbidden to share any of the code. The global variable is set in a while loop that reads a front panel element of the FPGA main VI. It is read in several clones of one VI, which passes it as a wire to several subVIs.

[benjamin-hinrichs · Accepted solution]

I was able to locate an error and generate a minimal version that shows the error described above. The problem seems to be that in certain circumstances the vi->vhdl converter can't figure out that a case structure (or a subVI for that matter) resolves to a constant output, when faced with a constant as input.

It can handle a control, but not a constant. This is indeed peculiar and seems to be an error.

[ogk.nz]

Have encountered this error myself when trying to compile code for FPGA on LV2018 SP1.

Similar initial presentation with no error warnings or anything presenting until trying to generate intermediate files where compiler would throw exception 61055.

Managed to track my issue down to a VI which was taken from a working FPGA program but when inserted into the new program seemed to corrupt the compilation. Replacing the VI with the internals resulted in the generation of intermediate files working as normal.

However it seemed to be something about running the process inside a VI as event creation of a new VI with the working components caused the error to re-appear.

Unsure about the exact cause of this as this exception as there are no arrays, and the subVI exists only to perform some basic boolean logic and trigger an interrupt if require