route "AI Scan Start" signal

[graduate student 44]

i'm using several pxi-4472 cards on the same pxi-1006 chassis. i've synchronized the master card (in slot 2) with the slave cards and have routed "AI Start trigger" to RTSI0, so that now the cards collect data samples synchronously. sync_and_stream runs fine.

however, i've been having great trouble routing either "AI scan start" or "Scanclk" to an RTSI line? LV simply just doesn't allow it. i've looked through manual of pxi-4472 but haven't come across any mentioning of this issue. i wonder is this an intrinsic contraint for 4472 that routing these two signals to RTSI is illegal? if yes, what can i do to get around it?

[Jeremy R.]

graduate student,

Thanks for posting your question. Every question you ask gets routed to the same spot here at NI, so please only post each question once.

If you look at the user manual for the 4472 (http://www.ni.com/pdf/manuals/322940c.pdf) on page 1-6 you will see the available lines that can be passed through the PXI backplane. NI DSA boards do not use a Scanclk the way a MIO device would. Since the 4472s have dedicated ADCs for each input, there is no need for a Scanclk so that is why the option is not there for you.

What exactly are you trying to accomplish? From your post you have achieved synchronization, so what is your goal at this point?

Best Regards,
Jeremy R.
NI - Applications Engineer

[graduate student 44]

i'm trying to use a seperate fpga vi running on a pxi-7831r on the same chassis as a global timestamper. so for each data sample point taken on all the 4472 cards, i need to a pulse routed to the pxi-7831r card so that a timestamp can be taken. thanks!