Engine Simulation Custom Device Feedback

[Leo_Lemes]

Hi Todd

Thank you for your answer!

About this example of a simulated speed sensor signal, is it available somewhere or you built?

Leonardo Lemes

[ToddK]

Leonardo,

  Here is a link to a document that describes how the speed sensor signals were calculated within FPGA using the VeriStand FPGA Support libraries. The example has 2 sensors and uses a Gear Ratio and fixed number of SensorTeeth to determine the Pulse Generation packets.  Hopefully this example provides some guidance to creating your own solution.

https://decibel.ni.com/content/docs/DOC-23269

Todd Kutzner - Digalog Systems Inc.

[Merc_Bert]

I want to perform missing injector and spark detection in my VI.  So that every 360 or 720 degrees (depending on how the custom device was set up) the device will keep track of a injection or spark pulse occuring.  I seem to be having a hard time finding a good source for crank angle, I tried to feed the Crank Angle global variable (on the Main VI) into a sub VI that is almost a copy of a AES ECU Time duration Measurement vi, but I'm not having any luck.  I am trying to fire an IF statement when crank angle crosses zero but I don't think I'm catching it.  I was hoping someone had some suggestions on how I can improve this.

I have attached the sub vi where I am trying to perform the missing pulse logic, and an image of the vi where the sub vi is implemented (it is the gray box in the image).  The green box is a simple latch on until reset, where if either of those ditital lines go true, the true will be latched until I physically pull a pin low.

I am running LabVIEW 2011 SP1

Veristand 2011

PXI Box with PXI-7822R fpga

Regards,

Robert

[Brzeski]

Hello Devin,

I'd like to provide some feedback and ask for direction on an issue I've run in to while using the Engine Simulation custom device.

I'm using the Fuel Injector ECU events to monitor the pulse width and feed into a plant model. Now, my ECU is set to deactivate the fuel injectors at certain RPM's to prevent over-rev conditions. The issue I'm running into is that when I deactivate a fuel injector that ECU event appears to hold the last value rather than return '0' ms. And this holds true for all measured FI events (angle duration, SOI / EOI, time duration). A guess was that the custom device entered a counter where it was just ticking away waiting for the next falling edge.

Is it possible to add a timeout after a certain number of milliseconds or after one crank rotation without a count return 0.

Thoughts?

TIA.

[StephenB]

Yes I have noticed this issue too. I agree this needs to be solved with a timeout. Sorry for the trouble. I will add this to the TODO list. Do you have a suggestion for a default timeout value?

Unfortunately I do not have time at the moment to work on this. Might be a few months. Since this change would be isolated to the FPGA, you could add this functionality in yourself fairly easily.

[Merc_Bert]

StephenB,

Would you have a quick chance to talk a look at the issue I'm having? It might be something simple, but I seem to be missing it.

Thanks,

Robert

[StephenB]

Hi Robert,

I'm sorry but I'm currently swamped so I don't have time to look into it in detail. I can give you some suggestions. Can you strip out the real IO with a diagram disable structure and just run your logic under 'my computer' in the project? That would let you test it without compiling and using NI VeriStand. If you can do this, you can get support much easier since its more of a general logic question you could pose to our support engineers at www.ni.com/support

[MJMiller]

We have been successfully using the custom device for awhile, but ran into an issue when implementing a new Fully-Custom Cam pattern. 

It seems like there is an upper limit on the number of teeth generated by the device.  We are working on a 36 tooth pattern - we correctly set the number of teeth and imported the angles.  The config screen correctly shows all the tooth angles and the picture looks correct, but the waveform that we get out is limited to 32 teeth.

All the teeth are the correct width, but when you get to the 33-36th teeth the waveform is "blank". 

We've tried all sorts of combinations and still run into the same thing.  We just updated to Version 3.5 (were on Version 3.3), and we are running SP1.

Any thoughts?

Matt Miller

[StephenB]

Hmm... what version of AES are you using? There was an issue with AES that caused similar behavior because the bit widths of the FXP data were too small.

If you dont know- look at the bit widths of the FXP controls on the fully custom teeth loop in your FPGA code and write them here

[MJMiller]

I'll have to ask our experts... I'll get back with you.  Thanks for giving me a lead to chase down though.

-Miller