Hello Ray,
At last i am able to update the result(Single VI) from the labview to teststand, i.e the example that we were discussing yesterday.
But now i have a peculiar issue, as i told you earlier i need to interface my top level VI (which has around 10 sub VI s) to the test stand , but when i add the top VI as a pass
fail test , in the specify module section i can't see any of the parameters, value,default or inout.. as i saw in the ealier case(previous example..) so i am unable to connect both the labview output to the test stand.This obvioulsy will not update the labview output to the test stand which prevents teststand to give the correct ouput.
I saw the examples given with the software ....for instance i saw computer motherboard test sequence, in that their are power fail test, ram test etc ..he is taking(watching) the final out put (powerfail, ROMfail & then connecting to the teststand variables) , i guess i also need to do some thing pretty similar, but my question is when this VI (ROM test )is executed how it will get the info with regards to the ROMfail .i.e how is it linked with the TOP file or its sub VIs ...i hope you understand what i mean ..........if not i will try to be more clear in my next post
Any suggestions on this will be quite helpful!
Thanks
