10-19-2020 02:26 PM
Can someone help with true table for this schematic please?
10-21-2020 11:43 PM
Hi adi80,
This is a CMOS NAND gate and the truth table is below:
A B Q
High High Low
High Low High
Low High High
Low Low High
The detailed states of the MOSFETs are below:
A=High, B=High
M1=OFF, M2=OFF, M3=ON, M4=ON
Q=Low
A=High, B=Low
M1=ON, M2=OFF, M3=ON, M4=OFF
Q=High
A=Low, B=High
M1=OFF, M2=ON, M3=OFF, M4=ON
Q=High
A=Low, B=Low
M1=ON, M2=ON, M3=OFF, M4=OFF
Q=High
Be careful when analyzing these states, note that A drives M2 and M3 while B drives M1 and M4. The table can be made more organized if the circuit is rewired (or component designation interchanged), for example with M1 being driven by A and M3 being driven by B.
If you will build this circuit I suggest that you replace the output variable Q with other name such as Y. In digital design, Q is generally used for latch/flip-flop (and derived functions) output.
Best regards,
G. Goodwin
10-22-2020 10:48 AM