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Saturation problem with 741 models

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Whenever I saturate a 741 op-amp by exceeding the limit of its positive supply voltage, the output saturates to the negative supply voltage.

For example, if I construct a voltage follower with +/- 15 V supplies and an input of +20 V, the output is (roughly) -15 V, not +15 V.

 

This occurs with a variety of 741 op-amp models, such as LM741*, UA741*, 741, and Op-Amp_741.

I saw similar problems with a few other op-amp families I tried.

 

Is this a known limitation of these models in Multisim, or am I doing something incorrectly?

See the attached file for an example.

 

Thanks,

Bob

Message 1 of 11
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As you have me curious, but I don't often use the 741, I duplicated your circuit the way I'd usually do it, verified it failed, and then swapped the 741 for a tl081.  Now you get the opposite -- the sat problem has now moved to the negative swing.  I don't know why.

 

 

 

 

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Playing with it, I've found that it has something to do with harder sat.  The problem doesn't arise (with the tl's at least) until the op amp is driven harder into sat.  Barely into sat and you're ok.

 

As much as I've used op amp circuits, I've never seen this problem before.  Thanks for pointing it out.  Has it always been like this?  I don't often cause op amps to clip, but I do remember one design (that was never built) where I was counting on it.  ...very bizarre problem.

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Yes, I saw the same problems as you have seen.  Some op-amps exhibit the problem by incorrectly saturating at the positive supply voltage.  And for my voltage follower circuit, I had to try to exceed saturation by 0.62 V before the bug occurred.

 

I also built an inverting amplifier circuit with a 741 that seemed to saturate correctly.  However, it started to exhibit the problem when the saturation became really great (e.g. 300 V clipped to 15 V).

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Hi,

 

This problem may be due to JFET inversion. Some opamps, especially JFET opamps, exhibit this behaviour. When the output is expected to exceed some positive threshold, the output inverts to the negative rail. If you hooked up a JFET opamp in a real circuit, you will see this behaviour. So, this may have to do with the opamp model that you are using. If this is not the behaviour that you expect (i.e. not what you observe in a benchtop setup), my best suggestion is to substitute your simulation opamp for another one that is similar in performance, but does not exhibit the same output inversion.

 

Take a look at this page by Analog Devices. This phenomena is outlined in the section labeled "What other features of op amps should the user know about?".

 

Hope that helps.

----------
Yi
Software Developer
National Instruments - Electronics Workbench Group
Message 5 of 11
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Yyao,

 

You're serious, right?

 

Did you happen to notice that the original post wasn't a JFET op amp?  

 

Any more ideas?

 

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Do you people even listen to our problems?

 

I don't think you do.  No, I'm finding, at least over the last year, we're helping each other more than you're helping us.

 

BTW, I actually physically built my synthesizer the other day.  It works like a champ.  Multisim on the other hand...  Incidentally, there was a slight logical flaw, but Multisim should've caught it.  Instead, I caught it right out of the gate when I built it.  Why didn't Multisim catch it?  Did you even try to run my circuit?

 

Incidentally, you just came out with a new rev, right?  Did you fix your PLL model yet?

 

 

 

 

 

 

 

 

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Message 7 of 11
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Yyao,

 

I'm sorry.  I read some of the link you posted, and then I compared the JFET to the BJT-based.  Indeed there were two different responses.  Only when I'd exceeded 0.7 + Vcc did things invert.  Therefore, thank you for the tip.

 

However, in my apology I'm only apologizing for the tone of my post and that I jumped to a conclusion, as I do feel much like I said in the other.  I do feel like we help each other more than Multisim helps us.  I'm thinking you're shorthanded based on the evidence.  However, just because you're shorthanded it does not fix things -- the problem doesn't just disappear when you don't help, even if there is a good reason.

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Solution
Accepted by topic author btriffles
 yyao wrote:

Hi,

 

This problem may be due to JFET inversion. Some opamps, especially JFET opamps, exhibit this behaviour. When the output is expected to exceed some positive threshold, the output inverts to the negative rail. If you hooked up a JFET opamp in a real circuit, you will see this behaviour. So, this may have to do with the opamp model that you are using. If this is not the behaviour that you expect (i.e. not what you observe in a benchtop setup), my best suggestion is to substitute your simulation opamp for another one that is similar in performance, but does not exhibit the same output inversion.

 

Take a look at this page by Analog Devices. This phenomena is outlined in the section labeled "What other features of op amps should the user know about?".

 

Hope that helps.


I don't think it is the "phase inversion" problem described in the first paragraph of the aforementioned section.  I don't think the 741 is a JFET or the common-mode input is too negative.

 

However, it does seem to be consistent with the "more serious form of latchup" described in the second paragraph.  The issue occurs when the input exceeds the rail voltage by ~0.6 V, which could be turning on some internal diodes.  The page suggests that this would destroy a real op-amp.  In simulation, the op-amp wouldn't be destroyed, but it might show erratic behavior when Vin > Vrail.

 

Does this make sense to anyone else?  I'll try to remember to test this with a real op-amp next week.

Message Edited by btriffles on 03-17-2009 07:52 PM
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Message 9 of 11
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btriffles,

 

Yes, that is what I'm thinking with respect to the 741 issue, that this is Multisim's response to a bad design -- "latchup" is undesireable.  (Latchup, inversion, whatever, it's a bad response.)

 

Like I said before, whenever I design with an op amp, I don't generally overdrive it, unless it's an op amp which permits such.  Now granted I don't claim to be some great circuit designer; rather, I just know there are common mode limits and absolute maximum ratings -- they're usually just after the introduction of the part in the datasheet.  But that's something that's nice about Multisim.  It let's me blow up stuff without actually blowing it up.  Any time I have a simulation not work as intended, to be honest, I blame Multisim first, but then I try to figure out where the error is coming about, figure out how I can get Multisim to work around the issue.  Sometimes it really is Multisim's fault; however, there has been more than one occasion where all along it was my screw up.  Multisim is only so good when the design is flawed.

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