06-08-2011 01:34 PM
I get the following error messages when I run the simulation.
Error: SPICE Netlist Error in schematic RefDes '', element '_uc2fffffffe*************': Unsupported component prefix type '_'
Error: SPICE Netlist Error in schematic RefDes '', element '<unknown>': Due to errors, the component '_uc2fffffffe*************' has been omitted from the simulation
Error: SPICE Netlist Error in schematic RefDes 'u1', element 'e_u3_e7': Unknown controlled source table syntax in 'e_u3_e7:ad8336__vga__1'
Error: SPICE Netlist Error in schematic RefDes 'u1', element 'ad8336__vga__1': Due to errors, the component 'e_u3_e7' has been omitted from the simulation
This just a test ckt for AD8336 chip.
thank you
06-09-2011 08:51 AM
Hi Halifax,
I took a look at your circuit. It seems that the AD8336 component has not been created properly. There seems to be no spice model linked to it and thus you are seeing simulation errors. You can go through the component creation tutorial in the link provided and try to create the component again.
http://zone.ni.com/devzone/cda/tut/p/id/3173
Hope this helps.
03-20-2012 05:18 AM
hey there
im also experiencing the same problem. please help
------ Checking SPICE netlist for TRT - 20 March 2012, 12:09:02 PM ------ SPICE Netlist Error in schematic RefDes 'u5', element 'xu5': Invalid subckt definition name '21' SPICE Netlist Error in schematic RefDes 'u5', element '<unknown>': Due to errors, the subckt instance 'xu5' has been omitted from the simulation SPICE Netlist Error in schematic RefDes 'u4', element 'xu4': Invalid subckt definition name '23' SPICE Netlist Error in schematic RefDes 'u4', element '<unknown>': Due to errors, the subckt instance 'xu4' has been omitted from the simulation SPICE Netlist Error in schematic RefDes 'u3', element 'xu3': Invalid subckt definition name '25' SPICE Netlist Error in schematic RefDes 'u3', element '<unknown>': Due to errors, the subckt instance 'xu3' has been omitted from the simulation SPICE Netlist Error in schematic RefDes 'u2', element 'xu2': Invalid subckt definition name 'u2_open_y' SPICE Netlist Error in schematic RefDes 'u2', element '<unknown>': Due to errors, the subckt instance 'xu2' has been omitted from the simulation SPICE Netlist Error in schematic RefDes 'u1', element 'xu1': Invalid subckt definition name 'u1_open_rb7backslashkbi3backslashpgd' SPICE Netlist Error in schematic RefDes 'u1', element '<unknown>': Due to errors, the subckt instance 'xu1' has been omitted from the simulation SPICE Netlist Error in schematic RefDes 'u6', element 'tu6': Unable to parse parameter name ======= SPICE Netlist check completed, 11 error(s), 0 warning(s) ======= Error message from simulation: tu6: transmission line z0 must be given Error message from simulation: doAnalyses: No such parameter on this device Error message from simulation: tran simulation(s) canceled
03-21-2012 08:36 AM
Hi,
Can you post your circuit so we can take a look at it.
03-26-2012 01:56 AM
Morning Tayyab R
im unable to attach i get the following error:
Please correct the highlighted errors and try again.
03-26-2012 02:55 PM
Hi,
You can place it in a zip folder and upload it.
03-27-2012 05:40 AM
thanx.. here you go.
03-28-2012 08:32 AM
Hi,
The reason you have all these errors is because you have not created the layout components correctly. The header and connector should be layout components but they seem to have models which is not correct. When you are going through the component creation, you should select Layout Only components.
I have written a small document which shows you what you will need to do for all such component on your design.
Hope this helps.