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cRIO Vibration Analysis with FFT run on FPGA

Hi all,

 

I am working on a vibration analysis project using an NI9234 Accelerometer input module running on a CRio 9074 chassis. To off-load some of the tasks (another part of the application is already taking up a fair amount of memory) I would like to perform the FFT on the FPGA target. I am fairly proficient with LabView and FPGAs but am reaching a dead end with the FFT implementation.

Here's the problem: The frequencies I expect are in the range of 0-600Hz so I can reduce the sampling rate to increase FFT accuracy (bins). However, I would also like to have the display updating at a decent rate (say every 250ms for further analysis). I probably need to do windowing since I will overlapp the samples in the FFT. Unfortunately I wasn't able to find a good example on that. The only example I found used a target scoped FIFO to transfer the samples from the acquisition loop to the FFT loop. I would like to use all four inputs and don't know how I would expand the example (single input) to four inputs. Do I need to run each acquisition and FFT in parallel, so eight parallel loops (4 acquisition, 4 FFT)? Also, the FIFO needs to be big enought to avoid underflow and overflow, but when I do windowing and then FFT how can I make sure I read 512 samples and then another 512 that perfectly overlap with the previous set?

I would appreciate if someone could either direct me in the right direction or give me some advice on how to approacht his. Also, I heard that there was a demonstration/talk at NI week about exactly this issue and a solution was presented. However, I can't find anything online. Anyone knows what I'm talking about?

 

Thanks in advance for your input

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Hello Adirobu,

 

It seems as though your reasoning is valid if you wish to run all of the acquistion and fft analysis in parallel and I would encourage you to explore the windowed FFT shipping example found in the NI Example Finder as that might be a good place to start. Referencing your question related to acquiring 512 samples and overlapping exactly with the next set of 512 samples I would suggest setting up FIFO's that are sufficiently large to account for this and then to ensure that the consumer loops (fifo reads and fft processing in this case) are necessarily faster than your analog acquisition rate. If this is not the case than your fifo data transfer will exhibit data loss and timeout errors will likely result. I would suggest attempting to find an optimal sampling rate that takes this into consideration so that your application is not bound by the time it takes to process your data in the consumer loop.

 

Best,

Blayne Kettlewell

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I would recommend a different approach - that is to perform the FFT on the RT controller.  What you should move to the FPGA is converting the vibration or acoustic data to float before sending it to RT.  This will free up your processor on the RT side to perform the FFT where you will have tremendous flexibility in managing windowing, etc.  The Waveform reference does this conversion for you. 

 

1) start with the waveform reference library to optimize both the FPGA and RT for the data acquisition process:http://sine.ni.com/nips/cds/view/p/lang/en/nid/209114

2) consider using the cRIO vibration data logger to add communications such as cRIO status and waveform streaming:  http://zone.ni.com/devzone/cda/epd/p/id/6388

3) review the optimization techniques and benchmarks for FFT calculations on the cRIO RT controller:  http://zone.ni.com/devzone/cda/tut/p/id/12196

 

Our S&V and Condition Monitoring team have helped 1000's of cRIO customers use these tools to get quick success and to have the analysis and storage capabilities needded in the cRIO platform. 

Preston Johnson
Solutions Manager, Industrial IoT: Condition Monitoring and Predictive Analytics
cbt
512 431 2371
preston.johnson@cbtechinc
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