Multi-buffered acquisition with digital trigger

[Oberdiek]

I have a PCI-MIO-16E1 and I need to do three channel (250KHz/channel - ~400 scans/trigger) multi-buffered acquisition with digital trigger (trigger => 30 Hz).
I could not find any example of multi-buffered acquisition. Could anybody help me?

[Filipe A.]

Hello;

When you set up a buffered acquisition, even if you have multiple channels being acquired, the buffer is split up in between those channels. To ilustrate that fact, lets imagine a 3 channel acquisition in between channels 0,1 and 2. The buffer is split in between those 3 channels, in a way that the first memory position of the buffer contains data concerning channel 0, the second memory position has channel 1 data, the third memory position has channel 2 data, the fourth memory position has channel 0 data again, and the whole cycle repeats itself.
Hope this helps.
Filipe

[Michael_S.]

Hello,

I assume that you are refering to a retriggering setup where each time you recieve a trigger you take 400 samples on each channel at a rate of 250kHz per channel (total scan rate = 3CH * 250kHz = 750kHz).

In order to keep the system hardware timed you can use the two counters on the board to produce a retriggerable pulse train that will act as your scan clock. For example each time the counter recieves a trigger it will output a clock signal of 750kHZ with 400 or so pulses in order to take ~400 scans/trigger.
This clock signal can then act as the scan clock for your 3 channel analog input operation.

Now we have to figure out how to set up the retriggerable pulse train from the counters and have the analog input use the counter output as a sca
n clock.

Good thing there is an example that is already written
http://zone.ni.com/devzone/explprog.nsf/6c163603265406328625682a006ed37d/aab61e455564a04d862568930018e725?OpenDocument.

Good Luck.