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Can I synchronize two counters with 24 bit digital input and 8 bit digital output on PCI-6259?

I am using a PCI-6259, with an external sampling clock, to try to simultanously perform buffered generation and measurements (1 million x 1 microsecond each) of 2 counters, 1 DO (8 bits wide), and 1 DI (24 bits wide).

 

I generate the external clock signal from an additional NI PCI-xxxx card and route it over the RTSI bus. I then use this RTSI signal as a sample clock for 4 separate, yet simultaneous tasks, buffered event counting on counter 0 (Dev2/ctr0), buffered event counting on counter 1 (Dev 2/ctr1), buffered waveform digital input (Dev2/port0/lines0:23), and buffered waveform digital output (Dev2/port0/lines24:31).

 

The DO portion always work without a problem, but I can only get 2 of the 3 total inputs to work error free. e.g ctr0 and ctr 1 but no synchronized DI, or synchronized DI with ctr 0, but errors on ctr1. In the intended configuration with all taks running DI and DO work fine, but both ctr0 and ctr1 drop out, each  with "Error -200141" 

 

Am I butting heads with a strict hardware limitation here? Is there some NI, DMA, Buffer, Internal Clock etc limitation that I am unaware of causing this? I am trying to interface a Quantar 2400 series Position Sensitive Detector system, and I would prefer to do all of the interfacing with a single 6259. I have a workaround that involves leveraging additional PCI cards, but am searching for an "elegant" solution.

 

Cheers,

 

John.

 

PS, System details as follows

LV v7.1, v8.5 

WinXP Service Pack 2

NI PCI 6602, PCI 6259M, PCI 6025E, PCI 6036E, PCI-6733, PCI-GPIB and NI FieldPoint

 

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I would suspect that the counter tasks are the main culprit here.  At 1 MHz sampling, I'm kinda surprised that you can get the 2 counter tasks to work together even without any digital I/O.  In fact, from following other threads here, I wouldn't expect even 1 counter task to work reliably at 1 MHz sampling.

 

I couldn't find specs specific to a PCI M-series board, but here are some specs for other NI boards with counters:

660x series

E-series

 

Do you *need* to sample the counters at 1 MHz?  What info does that provide?  At what rate do the 2 counters receive their TTL "events?"   Sometimes, you can turn counter measurements inside-out and still get the necessary info.  For example, can you let the 1 MHz clock be the timebase for the counters and let the TTL event sources act as external sample clocks?  If you did that, then each time an event fired, you'd store the 1 MHz cycle number in the counter task buffer.  With proper initial start triggering, this cycle # would correspond exactly to the DO and DI sample #.  You'd retain the ability to correlate all your data.

 

-Kevin P.

 

CAUTION! New LabVIEW adopters -- it's too late for me, but you *can* save yourself. The new subscription policy for LabVIEW puts NI's hand in your wallet for the rest of your working life. Are you sure you're *that* dedicated to LabVIEW? (Summary of my reasons in this post, part of a voluminous thread of mostly complaints starting here).
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Hey Kevin, thanks for your response. I'll take this opportunity to expand a bit on the details of this application. I've routinely run counters on M series/E series cards in sync with other IO at 1 MHz without any problems in the past, but this is the first time I've attempted to "gang" two counters on the same board at the same time and am meeting with limited sucess.

 

>I couldn't find specs specific to a PCI M-series board, but here are some specs for other NI boards with counters:

 

sorry, it's a PCI-6259 M series multifunction DAQ series

http://sine.ni.com/nips/cds/view/p/lang/en/nid/14128 

 

>Do you *need* to sample the counters at 1 MHz? What info does that provide?  At what rate do the 2 counters receive their TTL "events?"  

 

well I need one counter to read digitized charge pulses from fast pre-amplifiers (~15 MHz max bandwidth) connected to a microchannel plate detector. These pulses are "raw" events. The second counter is recording "processed" events from the Quantar computer (measuring the microchannel plate signal) indicating successful processing of the "raw" event. With each "processed" event, there is also a 20 bit word that must be read in... hence the 24 bit digital read.

 

The microchannel plate is imaging the interaction of an ion beam with an electron beam. In this application, both beams are modulated into 8 separate phases. The measurement of both "raw" and "processed" events must be correlated to these modulation phases.... hence the sync'd digital output.

 

>Sometimes, you can turn counter measurements inside-out and still get the necessary info.  For example, can you let the 1 MHz clock be the timebase for the counters and let the TTL >event sources act as external sample clocks?  If you did that, then each time an event fired, you'd store the 1 MHz cycle number in the counter task buffer.  With proper initial start >triggering, this cycle # would correspond exactly to the DO and DI sample #.  You'd retain the ability to correlate all your data.

 

I though of this, and will end up trying it. I am wondering if there is some inherent hardware limitation of the DAQ card simultanously using 3 buffered input tasks with these timebases. I have found that older E series cards had issues with their counters, for instance one of the two counters being tied to the analog input to their mutual exclusion... while reading analog inputs that counter could not be used, or vice versa

 

Thanks again,

John. 

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Hello John,

 

When you say that you have routinely run counters at 1MHz in the past, were you referring to a counter output task or timebase source?  The sample clock on a counter input task is setup for buffered counter input.  This clock effectively gives the rising edges to read the counter register at a specified rate.  Our PCI-6259 m-series cards cannot handle a 1MHz buffered counter input speed.  Please take a look at the article here.  The PCI-6259 only has a 2 sample FIFO and our benchmarking shows that the results you can expect are around a maximum of 380KHz. If you are looking to do buffered counter input at 1MHz, my suggestion would be to consider the USB-621X series.  These cards have better results due to an increased FIFO size to 1024 samples.

 

Regarding your last questions about inherent hardware limitations of 3 buffered input tasks, I'm a bit confused by the following statement:

 

"I have found that older E series cards had issues with their counters, for instance one of the two counters being tied to the analog input to their mutual exclusion... while reading analog inputs that counter could not be used, or vice versa"

 

Were you using the analog input sample clock to clock your counter?  So, when you were running the analog input task you couldn't run the counter?  If this is what you are referring to, this should not be an issue.  

 

I hope this helps,

Paul C.

Applications Engineering

National Instruments

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