unit test framework Test Vector

[Ibanez]

Hi,

I just started playing with Unit Test Framework, and I was able to create a small test for a few cases of a dummy VI.

(ex. X as input X^2 as output. Just a trivial test get me started and I could scale up later)

I created a few individual test and their expected output and that worked fine. Then I tried creating a test vector to basically accomplish the same.

The problem I have is that after I select Input Value (my new vector file with my vector data). I can't figure out how to add a VECTOR of expected values (or more complex set of conditions than =,!=, >, ...) to go with it.

I'll appreciate any advice that points me in the right direction, maybe I'm approaching this the wrong way.

Best,

Cristian

[ShishKeBobby]

Hi Christian,

Have you taken a look at the following example?  Help > Find Examples > Toolkits and Modules > Unit Test Framework > Vector Generation.lvproj

[Ibanez]

Hi ShishKeBobby,

Thank you for pointing that example.

I did look at it, but they do not have "signal out" checked under Test Cases.

How do you know that the values generated by the wave are good values?

It looks like they were just testing if the function generator gave any error (please correct me if I'm wrong).

I think that my question is a little more like this:

given,

X , F(X), N

a1, F(a1), n1

a2, F(a2), n2

a3, F(a3), n3

a4, F(a4), n4

.....

So I'm wondering if I can have a Vector "X", and compare it's results to a Vector "N" in order to determine if it passed or not. (without having to create as many test cases as the number of elements in the vector).

Thank you for your help,

Cristian

[ShishKeBobby]

Hey,

Looks like, according to the help file, you'll need to populate each element to compare them.  I'll check around and see if there's a more effecient way to perform this operation though.  Have you considered making a custom VI to compare these vectors?  Maybe there's a shortcut there.

[Ibanez]

Hi Bobby,

Yeah I thought about creating  my own VI, and depending on the case I don't think it would be a big deal. I just thought there might be an easy tool to do it (something like what you find at VHDL SDKs).

Thank you again for checking,

Best,

Cristian