04-15-2021 11:48 AM
hi! I'm trying to acquire voltage data with a variable frequency of acquisition. I would like to create a tdms file with 2 columns 1 with the voltage data and the other one with its corresponding time of acquisition.
I'm attaching the project file and I hope someone could help me solve this problem!
04-15-2021 12:28 PM
Hi Alex,
I could not access your file as they are stored in 2020 version and I have 2019.
Usually questions like these have already been asked on the forum. On a quick google search using keywords: "add" "timestamp" "tdms" "labview" gives following results:
1) https://forums.ni.com/t5/LabVIEW/How-can-i-add-a-time-stamp-to-tdms-file/td-p/3100684
2) https://forums.ni.com/t5/LabVIEW/adding-timestamp-to-tdms/td-p/3034201
These posts may hold answer to your problem. Until someone suggests you something, reading these articles may lead you in the right direction.
04-15-2021 12:49 PM
yes thank you! but the problem is that I'm using a dma fifo, so i can't do what they are doing, or at least this is what I think, I'm relatively new to labview.
if there is a way to let you see my project just tell me and I will try to do it!
04-15-2021 01:44 PM
Hi Alex,
You can save your VIs for previous versions of LabView.
Article below on NI forum talks about it:
You can also look into "Version Conversion Board" on NI forum:
https://forums.ni.com/t5/Version-Conversion/bd-p/VersionConversion
04-15-2021 01:55 PM
it should be this!
04-15-2021 01:57 PM
Hi Alex,
@alex8624 wrote:
but the problem is that I'm using a dma fifo, so i can't do what they are doing, or at least this is what I think,
You are using an older cRIO RT target and you want to create that TDMS file in the (rather small) internal flash drive of that target?
You only set the sample rate once when you start the FPGA VI, so the whole data of each run uses the very same sample rate: why do you need an additional column containing the timestamps? This will double the filesize for no good reason! Just save the sample rate as a property of the one column containing the samples delivered by the FPGA…
04-15-2021 02:04 PM
thank you GerdW! you have shown me a really big mistake I was doing! I thought I was saving the data on my pc and not on the target! could you please show me how to do the dma fifo for doing this? in the varius exemple I have seen they all did what I have done, so i thought it was right
04-15-2021 02:08 PM
Hi Alex,
@alex8624 wrote:
I thought I was saving the data on my pc and not on the target!
The cRIO CANNOT access the harddrive of your host computer!
(You don't want that. Every virus programmer would do the same stuff once you would open such access…)
@alex8624 wrote:
could you please show me how to do the dma fifo for doing this? in the varius exemple I have seen they all did what I have done, so i thought it was right
In the "File" menu there is an entry "New...": this will open a dialog showing you a lot of example projects. There are example projects for RT/FPGA targets, including projects showing how to transfer measurement data from FPGA to RT to host computer…
04-15-2021 02:39 PM
I'm sorry GerdW, but I have seen them and I really can't understand what to do to send the data to the pc, I have seen the varius exemple of fpga but I still couldnt understand. if you could show me what to do I would really appreciate it!
04-15-2021 02:46 PM