LabVIEW

cancel
Showing results for 
Search instead for 
Did you mean: 

sine wave generator output frequency

Hi,

i'm using LabVIEW 2016 and the sbRIO9606 for my experimental setup. My problem is related to the "sine wave generator", I don't get, how it selects the frequency.

In my system I have an ADC who's driver I realized on the FPGA in a single cycle loop. The ADC reads N samples and writes it into a FIFO. What I want to do now is a digital lock-in detection, and the reference should be generated by the "sine wave generator".

In the sine wave generator I selected the correct FPGA clock rate (40MHz). For an output frequency of 100kHz, the frequency terminal should be 0.0025periods/tick. The code of the while loop with the generator block is attached.

For test purposes, I just write the digitized data as well as the output of the generator into another FIFO and read it from the RT-Target. If I now compile the FPGA-code and run it from the RT-Target, I get the correct digitized signal from the ADC but the reference signal is completely wrong. To get an output frequency of approximately 100kHz, I need to set the frequency terminal to 0.000475385, which is a factor of 6.019... away from what I expect. I don't see any point, what's going wrong there. If I simulate the sine wave generator, I get exactly the right signal from it (400 points for 100kHz @ 40MHz FPGA clock).

Does anybody know, what I did wrong there?

0 Kudos
Message 1 of 3
(2,507 Views)

Hi bene,

 

there is no timing in your while loop…

How do you assure "20MHz from ADC" and "output at 100kHz"?

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
0 Kudos
Message 2 of 3
(2,466 Views)

Hi Gerd,

that is right, there is no timing in my loop. This was just a hint for me, that the data from the FIFO is sampled with 20MHz and contains a 100kHz sine wave.

As far as I understood the "sine wave generator" block, with each execution it gives the next element from it's look-up table which corresponds to the frequency and sampling rate which is set. Therefore, for each element from the ADC FIFO which is processed, the while loop executes one time, giving one value from "sine wave generator" to the second FIFO.

I tried it with more elements in the FIFO and figured out, that the factor is exactly 6.

0 Kudos
Message 3 of 3
(2,461 Views)