11-18-2016 01:04 PM
I had a working FPGA vi. I created a backup of the vi and continued development. After some time I tried compiling the new vi and wasted a day trying to find out what caused the sudden 300% LUT usage.
Just now I tried to recompile the backed up (unchanged) vi only to find out it has the same 300% usage (I dont know how much LUT it used before but it must have been <75%).
So, what on earth magically took all the LUT, where do I start looking? Must be something thats not in the vi?
Is there a quicker way to get a rough ressource estimate without the 20min wait?
11-18-2016 03:25 PM
Once compilation is complete, the Compiler Status window gives you access to the Xilinx Log under Reports. If you haven't already looked at it, I would check it out. It will tell you LUT usage of individual things. The report can be daunting, but look for an item that uses a ton of LUTs.
Another way to go about it is compare your old code to new code. What changed?
11-19-2016 05:24 AM
Before we start: I cleaned up my project a little (removed VIs that arent even in the vi Im compiling) and recompiled - it magically worked. Even the original VI where the problem started (before I started to shrink it again) compiled. I have nooo idea what happened there.
XilinxLog.txt showed some things that seemed suspicious to me. First there were many
INFO: [Synth 8-3969] The signal iRAM_reg was recognized as a RAM template for dedicated block RAM(s) but is better mapped onto distributed LUT RAM for the following reason(s): The *depth (4 address bits)* is shallow.
Later there is:
WARNING: [Synth 8-3323] Resources of type BRAM have been overutilized. Used = 157, Available = 120. Use report_utilization command for details.
And many:
WARNING: [Synth 8-3463] Infeasible ramstyle = block set for RAM DualPortRAMx/InferredRamx/iRAM_reg,trying to implement using LUTRAM
But I dont know, that log is a lot to read. I attached the file so you can have a look at it, I cant get anything helpful out of it...