fpga: Re-Initialize Block Memory during Execution

[HelpMeJebus]

Hello,

I am working on a project in labview fpga 2010, using the Spartan 3e board. At the present, I am using a large chunk of block memory in a VI and initialize it using an initialization VI that reads values from a spreadsheet and places them in the memory. It works for the first time, however I want to be able to re-initialize the memory during execution of the VI (i.e. I overwrite all the values in the table, then after a certain time I wish to reset them back to their initial values). Is there any way of accomplishing this on the FPGA without using double the memory and simply writing the changed values in a different location while leaving the originals unharmed? Thanks for your help

[Peter_W]

Hi HelpMeJebus,

I played around with this for a while today and the only way I can see to do this is to write those spreadsheet values into a FIFO and send them to the FPGA to write over that memory block when you want to reset it. If you already have a VI that does this to initialize the run, can that VI be called during execution to reset the memory? If you post the code you are working with that would help with conceptualizing a way to do this, but unfortunately there isn't an easy reset button for memory blocks.

Regards,

Peter W.

[BradM]

I think the approach I would take to solve this would be as follows:

Protect access to the block RAM with helper VIs that provide some level of locking (see http://zone.ni.com/devzone/cda/epd/p/id/6014 for some ideas)

Lock the block RAM when you're about to change it, and the go ahead and push the new values to the FPGA, pull the old values to remember them on the host, or both

Unlock when you've completed updating the RAM contents.

Note that, depending on how large this block RAM is, this approach could be painfully slow (since the Spartan 3E boards don't support DMA, you'll have to create your own mechanism for pushing the data to the device)

[SolarSystemsLLC]

I think you're out of luck if staying inside the NI tool chain. Your initial approach of using two BRAMs is about the only way to accomplish this (or the functional equivalent). If the target supports CLIP nodes, you might look to see if there's a way to get the chip to reload data into BRAMs from VHDL...

[DatLe]

I am having a block memory used as a map, which has 1024 points. Is there any way to initialize the memory automatically for quartet [start address, end address, starting value, slope] instead of typing manually?

[BradM]

For only four points (which I assume are going in the same map?), I would recommend simply having some initialization baked into the FPGA design or, if it is always meant to be connected to a development machine, from the host VI which is communicating with the FPGA. Using some of the predefining mechanisms is going to be too heavyweight

[DatLe]

The memory has 1024 points, each point has 4 data values.

[BradM]

Ah, I see. Are these points static or do you want to change the maps? If you need to be able to easily change the maps, you're going to need to create a system that will load them from a file on the host, at least that's going to be the easiest mechanism to achieve a dynamically-loadable, changable system.

[DatLe]

The memory data is just static, but 1024*4 times of typing or copy/paste is too much to me. It is also easy to put wrong value in. I don't know if Labview has a tool to do loading from file/spreadsheet somehow.

[BradM]

The main issue is going to be that there is no one solution that will work for all user applications since there is no one format to the data that will be preloaded. Where is the data currently being held for the map?