04-29-2014 04:57 PM
I think I have what I need. The following resources helped tremendously
http://www.ni.com/example/31066/en/ describes how to use DDS to create arbitrary waveforms with FPGA.
Also there is an ni example that teaches you how to create a vi that will create a LUT (look up table) so that you can create any waveform. Find it at help>>find examples
04-29-2014 05:07 PM
Awesome, sorry I was not able to look into it furhter, but I am glad you were able to find all the resources you needed.
Post again if you have issues with the LUT or other aspects of the project.
Adam
05-01-2014 11:01 AM - edited 05-01-2014 11:02 AM
I am able to modify some of the code given at:
http://www.ni.com/example/31066/en/
The wave form created looks good. But I am greedy...
I would like to produce my waveform at 20 Hz with nHz resolution.
It is my understanding that the freq resolution of this produced wave form is the ratio of the ref clock freq (40 MHz) divided by the number of bits in the phase accumulator (32 bit). This yeilds a resolution of 9 mHz. I would like to get nHz resolution. If I divided down the ref clock frequency to 40 Hz and then used this 40 Hz as my new phase acummulator refrence I would get nHz resolution.
So how do I change my phase clock ref so that it is 40 Hz instead of the on board 40 MHz?
attached are png pictures of my code
05-01-2014 12:37 PM
After some research...
it looks like the Look Up Table 1D Express VI can be run in a single cycle timed loop. What if I ran the single cycle timed loop at 40 Hz? Would that ensure nHz freq resolution in the phase accumulator?