fpga (PXI-7852R) complex periodic waveform generation

[dthrash]

I would like to create a complex periodic wave (digital) with my PXI-7852R.

After checking out the article here on periodic wave form generation with cRIO and then trying for a couple hours to get this software to work on my fpga (PXI-7852R) I am not much closer to making this a reality. 

I bet some one with more experience could outline some conversion steps rather quickly...any takers?

Thanks in advance!!!

[rocket]

How big is the waveform?  The article referenced will help with anaolg output but not digital anbd unfortunately I could not get a link to the project.

Here is one idea to start with.  You can create very complex waveforms of 1's and 0's on your host with an intuitive interface that you create.  Build and pack the 1's and 0's into 32 bit unsinged integers.  DMA FIFO transfer is to use to tranfer large waveforms from host to FPGA and inherently each block is always 32 bits wide even when sending a single boolean, so using a 32 bit integer gets you 32 outputs per element that you transfer.

Receive the data on the FPGA and either continusly ouput the data while streaming form the host (more complicated and would require interrupts and logical coding, but doable) or save the data to FPGA block memory and trigger a memory read to ouput the waveform at a specifed rate.

Attached are two snippets you can view.  It shows the basic idea of how to send the data down via DMA FIFO as well as handling the conversion of the boolean arrays.  It is not perfect, simply meant to show you one way and I worte this very quickly without my Erio to test it.  I apologize if there are any mistakes thta cause confusion.

Hope this helps get you going.

Best,

Adam

[rocket]

It appears the snippet for the fpga code is funky with some of my locals (guess I have some learning to do on snippets) si I am attaching the VI to avoid confusion.

Also forgot to add a wait in the while loop of the host.  I assume you are on a Real Time controller, if not you could use an event structure instead of a polling loop.

Best,

Adam

[RavensFan]

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@rocket wrote:

It appears the snippet for the fpga code is funky with some of my locals (guess I have some learning to do on snippets)

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Don't use LabVIEW's built-in snippet tool.  It breaks things like references and property nodes.  Use the Code Capture Tool instead.  It works much better.

[rocket]

All of these cool downloads and toolkis I have and yet I still manage to not use them.  Thanks RavensFan, can always look to the knights for answers.

And there are a couple of bugs in the host code after reading such as the IRQ being asserted before the data placed into the FIFO and again the assertion of the IRQ before setting the FPGA FP control to stop.  Not sure what functionality will ensue but the idea is there.

Adam,

[dthrash]

Wow! Thanks for the comments everyone.

To be honest, what I really want to do is read an analog signal (periodic waveform) and measure its overlap with a reference periodic waveform. The result will be used as an error signal in a PPL. 

My thoughts are to program the FPGA to produce the reference wave form digitally and then multiply it by the digitized analog signal and integrate.

Do I have to produce a digital reference wave form or is there a simpler way to find the overlap?

Thanks again

[r_good]

I switched my accounts still the same Adam.  

Why not take the FFT and compare the freq of the waveform to a ref frequency?  How complex is the waveform?  Most likely more info is needed before answering definitely but there are a few ways I suppose to do this.  It all depends on how fast things need to happen and the contents of the reference waveform.

I suppose if everything were in phase you could do exactly as you say but you would have to save your ref waveform into memory and compare in a loop, I jsut feel there is a more effiecient way to accomplish your task if there was a bit more info.

Best,

Adam

[dthrash]

The reference wave form is

Cos[w*t]*SquareWave[w*t/(2*Pi)];

where w is 10's of kHz

You are right. My task is to create a lock in amplifier for this signal...but I dont want to just match the zero crossings. I want to compare the analog with the reference point by point. 

[r_good]

Is it possible that this helps?  It is a lock in amplifier design for the R-Series.  I have not looked into but just by definition of a lock in amplifier maybe this will work.

https://decibel.ni.com/content/docs/DOC-1762

Would you be able to post the proj you linked before, it keeps giving me a page not found when trying to download it.

Best,

Adam

[dthrash]

I think using that lock in would only measure the 0 crossings.

The software I originally posted can be found here.

http://www.ni.com/example/26548/en/

Again, my goal is to produce a digital reference signal with my FPGA and then find its overlap with a digitized analog signal (from the same FPGA ). 

I have attached some vi's I created that will create a wave form from a table of values and then compare these waveforms (difference of the two) in real time (these work great). Now I just need to get my FPGA to do this and replace one of the fabricated waveforms with digitized data. I realize the paradigm is quite different on the FPGA since I need to use DMA...or something like that. Any suggestions?

arbitrary Wave Displaydan.vi            Creates a wave form from a table of values that describe one period

aligndanint.vi                                        Uses "arbitrary Wave Displaydan.vi" to create two wave forms from two tables of values. Subtracts these wave                                                                   forms and integrates. The scaled difference (difference divided by the sum) is also displayed and integrated.

list1.xls                                                  data that describes one period of a waveform