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conversion time



Hi

I have a PCI 6221 board .

Does it's ADC conversion time equal to minimum interchannel delay for this
board (4us) ? May be really it takes less time ?

How much time must an input signal being connected for right conversion?

Thanks.


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Hello Alron,

The ADC conversion time is equal to the interchannel delay.  The minimum interchannel delay is the time when you are using the fastest rate your device can acquire at.  If you are acquiring at a slower rate, the ADC conversion rate will also be slower so you cannot assume that the minimum interchannel delay will be the time that you need your signal to be connected. 

You can check and set this rate.  In LabVIEW, you would use the DAQmx Timing Property node set to the property  More >> AI Convert >> Rate.  If you are using the C API, you would use DAQmxGetAIConvRate and DAQmxSetAIConvRate. 

If you need the conversion to take 4 microseconds I would recommend setting the conversion rate appropriately.

Please let me know if you have questions regarding this.

Laura

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Thanks Laura, I very appreciate you help.

Could you please clarify to me another question ?
I started an acquisition (PCI 6221, external sample clock) with a high level
dc signal (e.g. 3V), then during the
conversion it felt to zero, but it had no influence on the results - I got
3V!
It seems as the board has a sample/hold capacitor. May be it really has?

Thanks in advance.
Alron.


"Laura F." <x@no.email> wrote in message
news:1142885500662-340708@exchange.ni.com...
> Hello Alron,
> The ADC conversion time is equal to the interchannel delay.&nbsp; The
> minimum interchannel delay is the time when you are using the fastest rate
> your device can acquire at.&nbsp; If you are acquiring at a slower rate,
> the ADC conversion rate will also be slower so you cannot assume that the
> minimum interchannel delay will be the time that you need your signal to
> be connected.&nbsp;
> You can check and set this rate.&nbsp; In LabVIEW, you would use the DAQmx
> Timing Property node set to the property &nbsp;More &gt;&gt; AI Convert
> &gt;&gt; Rate.&nbsp; If you are using the C API, you would use
> DAQmxGetAIConvRate and DAQmxSetAIConvRate.&nbsp;
> If you need the conversion to take 4 microseconds I would recommend
> setting the conversion rate appropriately.
> Please let me know if you have questions regarding this.
> Laura


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Hi Alron,

The PCI-6221 does not have a sample and hold capacitor.  How did you determine that the voltage fell to zero during the conversion time?  How did you check what the conversion time was?  Did you set or read it programmatically? Please provide more details about this.

Thanks,

Laura

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Hi Laura,

1. I suppose that conversion was started with the rising edge of the
external sample clock pulse that had rose 20us before the measured
voltage fell to zero. (I see it on the scope display.)

2. The conversion time is equal to the interchannel delay that I set
programmatically to 40us.

So the conversion will be finished 20us after the transient to zero.

3. With these considerations I guess that during the first 20us a high level
was converted and during the second 20us zero level was converted. But the
result is always the high level.



Thanks.









"Laura F." <x@no.email> wrote in message
news:1143069008752-342049@exchange.ni.com...
> Hi Alron,
> The PCI-6221 does not have a sample and hold capacitor.&nbsp; How did you
> determine that the voltage fell to zero during the conversion time?&nbsp;
> How did you check what the conversion time was?&nbsp; Did you set or read
> it programmatically?&nbsp;Please provide more details about this.
> Thanks,
> Laura


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Hi Alron,

Do you have multiple channels in your task?  If not, then the conversion time specification doesn't really mean anything.  This is the time that is required for the conversion when multiplexing between multiple channels.  If you are not doing this, then the conversion can happen quicker because not as much settling time is required.  Is this the situation you are in?

Thanks,

Laura

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Hi Laura,

now I'm working with two channels, but also getting the same results i.e.
although an external sample clock pulse is rising just when the signal is
falling to zero, the first channel's conversion result is equal to the pulse
amplitude.

  Any idea?

 Alron.
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Hi Alron,

I double-checked my thinking on this and it turns out that the voltage level is sampled right when the sample clock pulse is rising.  That value is held in the ADC chip on a sample and hold capacitor until it can be converted.  I believe this explains the behavior you are seeing and I apologize I didn't realize this earlier. 

Hope this helps,

Laura

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Thanks a lot, Laura.
I appreciate your help.
Sincerely yours.
Alron.



"Laura F." <x@no.email> wrote in message
news:1143668408608-345352@exchange.ni.com...
> Hi Alron,
> I double-checked my thinking on this and it turns out that the voltage
> level is sampled right when the sample clock pulse is rising.&nbsp; That
> value is held in the ADC chip on a sample and hold capacitor until it can
> be converted.&nbsp; I believe this explains the behavior you are seeing
> and I apologize I didn't realize this earlier.&nbsp;
> Hope this helps,
> Laura


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