closing labview after complining fpga code generates warnings

[spiffytool87]

Hello!

When I am closing LabVIEW, I get the attached warnings generated.

When compiling my FPGA code, the warnings appear after closing LabVIEW. The FPGA code is based on a cRIO Module VI Package, which is created with the cRIO Module Development Kit 2.1 and build with the JKI VI-Package Manager.

Everything works fine until I close LabVIEW.

Does somebody have an idea where these warnings could come from and what is the meaning of them?

Thanks!

[cbutcher]

The warnings are coming from the internal workings of the compiler for the FPGA code.

If you have access to an SSP, you should open a service request - someone from NI might be able to get to the bottom of the compiler issue.

Reading the log, it appears there's some unexpected behaviour surrounding a boolean to 0,1 conversion (but I think if I'm reading it correctly, that actually you have a boolean, and the FPGA module expects LabVIEW to automatically add that conversion, and it didn't happen).

In any case, those warnings shouldn't appear to end users I think..., so even if your code has a bug, it should handle it better than that (for example, by throwing an error during Intermediate File generation or similar).

[spiffytool87 · Accepted solution]

The warnings appear when using a

FPGA I/O Property Node  

FPGA I/O Method Node  

without any input or a constant at the error in terminal.

My code contained some copy and paste parts from old VIs. LabVIEW is from version 2018 a bit more sensitive about these things and generated these warnings.

However, it looks like LabVIEW did not detect this issue when generating the Intermediate Files during the FPGA compilation process. LabVIEW just showed me the warnings when closing LabVIEW afterwards.