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Swapping CompactRIO modules

Greetings,

I'm building a data acquisition fixture using a 4-slot CompactRIO chassis.  The code was up and running pretty well when I was prototyping it, but when I went to install the unit into the chassis, the layout of the case necessitated swapping the modules in slots 3 and 4.

My question is:  Is it possible to easily modify the code and/or the cRIO configuration so that this change is accomodated without having to rewire every affected variable in my hostcode and fpgacode modules?  I wouldn't mind so much if one of the modules wasn't a 32-channel DIO where I'm using 20+ of the connections ...

Thanks for any help,
Mike
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Hi Mike,

You should be able to just select the slot number for the cRIO module by Right Clicking on the modules in the LabVIEW Project and changing the slot location.  You shouldn't have to rename any of the IO.  After recompiling, it should work great.

Regards,

Basset Hound

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I've got all four slots filled in, so I can't select a different slot for any of them.  However, I can just delete the 4-channel guy and move the DIO over, then recreate the 4-channel module.  That will prevent a lot of the reconfiguring.

Thanks for your help,
Mike
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In case you don't have any slots available for swapping the location of the modules in the lv project, you should be able to take advantage of the cut-paste functionality of the LV Project. Do a cut operation on one of the modules, go to the other one and do what Bassett suggested (change location in properties page), and then paste the module you had cut. That should do the trick (just make sure you have a backup of your project before trying this out, as the clipboard could get overwritten).
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Once I actually tried it, I discovered that the modules and their channel definitions are decoupled from one another.  So you can just delete both modules, recreate them, then relink them to the channel definitions.  It hurts my head a little that Mod3 is in Slot4 and Mod4 is in Slot3, but I can live with that given I didn't have to reset all the fpga code.
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What I would suggest is that you rename the FPGA I/O items (channels) to match back the location or to decouple the name from location while the FPGA VIs are in memory. The I/O nodes will automatically re-link to the new names of the channels (if the rename happens while the VIs are in memory). Don't forget to save the VIs once you are done with the renames.
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Yep, that did it.  Now I just have to sit around half an hour for my FPGA to recompile ... Smiley Wink
Ahhh, the joys of a 6-year-old CPU ...

Thanks again, for everyone's time,
Mike
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