Hi all:
I encountered a very strange problem with falling edge detection in my project.
#1
I used a "wait on falling edge" function in my program, In the field, while testing with live signals I saw there are noises (spikes) on the start signal line. And the program was triggered to start measurement many times even if no PCBA is moving. I suspect "wait on falling edge" function thinks noises/spikes are also falling edges.
#2
Therefore, I change the FPGA VI to use a event counting method shown in Page 5 of the white paper (attached). According to 7830R user manual, 0-0.8V is consider low & 2-5V is considered high. I can see from oscilloscope that all noises/ripples on the start signal line is in the range of 4-6V. So theoretically this type of noise should not affect high/low readings and therefore falling edge detection based on the event counting method. You can have a look at the small FPGA VI (without host program) test program I wrote (attached).
However, while running this FPGA VI itself. I can see the count number increasing even though there are no pulses and falling edges (only some small noises and ripples between 4-6V, as seen on the scope). And this is very strange. If I supply a very pure 5V DC without noises/ripples to DIO0, then the count number stays at 0 and doesn't increase.
See if you have any idea for such a problem.
Hope can receive your response asap!
Thanks
Charles long
