Showing results for 
Search instead for 
Did you mean: 

Split LV example into event structure

Hi forum,


I'm wondering if splitting the LV example in the way I do here is fine or not. This is an example from LV (Generate DDS Clock, divide and





I want to split the example like this (have start trigger)






0 Kudos
Message 1 of 4

This is a good idea to introduce Event structure, so that your program can wait for 'Start' trigger and similarly for 'Stop' trigger. But I would always avoid to executing big codes inside event structures and rather I'll prefer it to do in a different state (of a state machine).

I am not allergic to Kudos, in fact I love Kudos.

 Make your LabVIEW experience more CONVENIENT.

0 Kudos
Message 2 of 4



the screenshot of the code looks well, from a wiring point of view.

But my question is:

You don't have defined an event source yet: What should that be?

How can you make sure that initialization is done before trying to measure things when you split functionality into different event cases?


Overall, you have to ensure a certain order of events to occur. So this might make things more complex that simply staying by "as is" without the event structure.


Also the remark of moderator1983 is correct that you should avoid to insert "blocking" code in the event structure. If you have functionality talking a couple of seconds, you should use producer/consumer.



CEO: What exactly is stopping us from doing this?
Expert: Geometry
Marketing Manager: Just ignore it.
0 Kudos
Message 3 of 4

Hi guys, thanks for comments.



yea sure, I think I'll use state machine for my project. But this is just a question about how to convert example into event structure. Now that you mentioned it, I guess I need to put some blocks out of event structure, right?



my hardware for this is pxie6674T.


I'm working with some pxi devices and need to get them work together through one "Main.VI".


my task is actually something like this:

1. Start --> initialization

2. By clicking "start CLK"-button, I would simply generate clk and synch the clock with my pxi clk.

3. At this point, I can generate either analog signal (with daqmx) or digital signal (with hsdio and daqmx dig port), and also acquiring analog signal (with niscope) and digital signal (with hsdio).

4. At some point, I think I'll need to generate and acquire signal at the same time, which means I can share start trigger through chassis.


Now, I'm kinda stuck how to put them together in a Main.VI. I'm looking at example of producer/consumer with event-register structure and I think I'll try to build my system with this method.




0 Kudos
Message 4 of 4