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Re: FPGA Array of I/O References

Hello
I'm working on a project based on the example getting started 5783.

My problem is that when I compile by referring to the bitfile, the project works perfectly, but when I refer to the VI without changing anything, I have an error in the stream on the AO loop.

I tried to do some modifications in the FPGA VI and compile to have a new bitfile, the project don't work by refering the new bitfile.

It only works by referring the bitfile by default ! 

what can be the problem ! 

thanks

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Your message doesn't really seem to apply to the thread you posted into.  I'm going to move this to its own thread so it gets the attention it deserves.

 

I suggest you attach some code so we can see what you are doing.  It is very difficult to help someone debug a paragraph.

 

(Originally posted in https://forums.ni.com/t5/LabVIEW/FPGA-Array-of-I-O-References/m-p/3824562)

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Hello, 

Thank you for your reply, 

I have problems with the references,
For example, I'm working on the NI 5783 Getting Started example that can be found in the Labview Examples.
By default, when I open the project, the HOST VI makes refenreces through the bitfile, and it works very well.
Me, I modified the FPGA VI and when I will refer to the new bitfile generated after the compilation or refer to the FPGA VI, the compilation on the HOST crashes and displays error.

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I work with labview 2017, (RIO0, PXIe, 7975R) and (IO module, NI 5783)

 

I'm working on the NI 5783 Getting Started example that can be found in the Labview Examples.
By default, when I open the project, the HOST VI makes refenreces through the bitfile, and it works very well.

I modified the FPGA VI and when I will refer to the new bitfile generated after the compilation or refer to the FPGA VI, the compilation on the HOST crashes and displays error.

My problem is that when I compile by referring to the initial bitfile (NI 5783 - Getting Started_7975R) , the project works perfectly, but when I refer to the new bitfile (NI5783-GettingSt_FPGATarget2_NI5783-GettingSt_J5i5XucqzsU) or the FPGA VI without changing anything, I have an error.

It only works by referring the bitfile by default (NI 5783 - Getting Started_7975R)

what can be the problem ! 

 

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