Hi,
as pointed out at http://www.shef.ac.uk/~phys/teaching/phy107/srff.html
you have a situation with a RS flip flop that it can enter an unstable state before it settles out. That's the nature of the circuit design.
I've attached a .vi which can be used as a sub.vi to emulate the RS flip flop. It relies on an uninitialised shift register to maintain the data in Q.
If you need multiple RS flip flops, you'll need multiple of these .vi's. (suggest you look at .vit's - vi template files, and use VI server to create multiple in memory).
I guess you could always use a boolean control off to one side to represent this - you take the state of the boolean now, and if you send a reset, then you clear it (set it to false) if you send a set, you set it, if you send
neither, you leave it at its current value.
Hope that helps
S.
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