PWM read through analog input in (myRIO-1900) fpga is not aquiring the actual pulses

[triptathakur]

Hi Guys,

I want to read PWM pulses from the analogue input pin in FPGA(myRIO -1900). With the duty cycle of 50%, I am getting the pulses abnormally as shown in the screenshot.

I am using ticks to generate the PWM pulses. 100 ticks as PWM period

At the same time, I am using 1 tick to read the analog Input samples.

In the waveform chart, the duty cycle is 50%. But the pulses are not uniform. they are randomly sampled by the analog input.

HOw can I sample the exact waveform of the PWM pulses from the analog input?

[GerdW]

Hi trip,

do the signal analysis in the FPGA - WITHOUT any charts, WITHOUT any online debugging through the LabVIEW IDE!!!

Background:

While you can watch your FPGA VI through the LabVIEW IDE and while you can create charts in the FPGA VI to check the readings it is NOT recommended to do so!

Create an RT target VI to communicate with your FPGA. Create a PC host VI to communicate with your RT target VI.

Check the example projects for RT&FPGA development!

[triptathakur]

Hi Gerd,

Thanks for suggesting to do so.

But the actual problem is I am reading a voltage signal from the real world through FPGA. this is an output from step-down DC-DC converter and is in the form of Pulses. It is not sampling the values continuously like I am observing in CRO( Oscilloscope). These continuous pulses are very important for me as I am taking the average of consecutive 100 values which may affect my closed loop algorithm in FPGA.

For example, I have generated PWM pulses of 10KHz from the pwm pin of myRIO and is connected to CRO ( Oscilloscope). I am able to see the exact pulses in CRO as per my Duty cycle.

But when I am observing the same waveform in the waveform chart  through the analogue input at a rate of 25ns( this is equal to one tick in myRIO) I am unable to see the actual pulses of my waveform.

So I just want to build this waveform

[triptathakur]

Hi Gerd,

As you said, I have tried using the host.But the response is same as shown in the screenshot.

tell me some improvements to be made in the block diagram for reading the Accurate PWM pulses

[GerdW]

Hi trip,

- your loop iterates at an interval of 100ms, but you want to measure pulses with much higher (time) resolution. This doesn't fit!

- you only read one sample from FPGA: to measure those pulses you should use a FIFO to stream at much higher sample rates!

- think about using two loops, one to set new values, one to read the FIFO data stream…

[triptathakur]

Hi Gerd,

As you recommended, I have started using FIFO and the screen shots of vi's are attached below.

If I start running the simulation, the simulation is terminated immediately.

I have used "-1" to the input of timed loop. still, it is terminating very fast.

here is the host vi circuit screenshot.

How can I clear this problem

[GerdW]

Hi trip,

How can I clear this problem

Use probes to KNOW why your VI terminates that fast!

This process is called "debugging"…

Why do you use a "stop" button in the FPGA? What's the state of the FPGA stop button right after starting the FPGA VI? One problem with local variables and switching buttons is: you need to initialize them correctly!

At which rate do you want to sample at your AI1 input?

How long does it need to fill the FIFO in the FPGA?

Why don't you clean up your VI before uploading? Even if it doesn't disturb YOU it is annoying for us - and you would show some kind of respect for this forum…

[triptathakur]

Hi Gerd,

1. How can I clear this problem

Use probes to KNOW why your VI terminates that fast!

This process is called "debugging"…

As you suggested me to observe through the probes, yes. I observed through the probe and also used the highlight button in the host vi. A value of zero came from the element and the Vi is terminated. I think the loop run only once and got terminated

2. Why do you use a "stop" button in the FPGA? What's the state of the FPGA stop button right after starting the FPGA VI? One problem with local variables and switching buttons is: you need to initialize them correctly!

yes. I have initialised it correctly by changing its mechanical action. there will be no error with respect to stop button.

3. At which rate do you want to sample at your AI1 input?

I would like to prefer sampling my PWm at 40MHz only. so that I will get a clear waveform.

4. How long does it need to fill the FIFO in the FPGA?

I do not know what exactly  it means. Because I am using the FIFO for the first time.

Why don't you clean up your VI before uploading? Even if it doesn't disturb YOU it is annoying for us - and you would show some kind of respect for this forum…

My apologies for the inconvenience caused to you.

I did not understand what does this mean "cleaning the VI". If it is with respect to adjustment of blocks in a furnished manner, then Yes I did it by using CTRL+U.

 Please recommend me some methods to use FIFO to obtain my desired continuous waveform

[GerdW]

Hi trip,

A value of zero came from the element and the Vi is terminated. I think the loop run only once and got terminated

1. Why do you "think" instead of "know"?

Why should the loop terminate after reading zero elements? The stop condition is set to "stop on error OR stop on stop button"!

Again: use probes to debug your VI. Why does your loop stop?

2. Are you sure the button will have a mechanical action in the FPGA? Again: Why do you need a stop button at all in the FPGA? The loops should run "forever" (read: as long as the FPGA has power)!

3+4. At 40MS/s a FIFO of 10kS will be filled within 10k/40M=250µs. Does your RT host read the FIFO fast enough?

If it is with respect to adjustment of blocks in a furnished manner, then Yes I did it by using CTRL+U.

Well, apparently not in the images postzed above… 😄