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PWM Dead-Time Generation-Labview FPGA

Hello Everybody!

 

I am using a cRIO-9012 with NI-9401Digital I/O module for PWM signal generation with variable Frequency,Duty Cycle and Dead-Time. I am able to vary the duty cycle and frequency with this first VI(PWM_VI.png) but i could not generate the variable dead-time, can anybody help me in this regard, i thank in advance. 

 

I tried with another VI(with_dead_time.png) it is possible to change dead time but there i cannot change the duty cycle in percentage and so accurate. So any help in this regard is in advance appreciated. i attach both VI's.

 

 

 

With Best Regards,

azy

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Hallo,

 

Here are the relevant VI's of the above project.

Please help me in this regard, thanx in advance.

 

 

 

Best Regards,

azy

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Hi,

 

I dont know what you mean with dead time. But I have found this instruction how to implement a PWM on a FPGA. If this dont helps, please give me an explenation about your dead time.

 

Developing a PWM Interface using LabView FPGA

http://www.ni.com/white-paper/3254/en/

 

Kind Regards

 

Jerry

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Hallo Jerry,

 

Thanks very much for your reply, here i am attaching a picture of a high and low side switch waveform of a synchronous dc-dc converter, the dead time means that there is a user controlled delay between the high and low side switch so that both switches cannot turn on at the same time and so we do not have a short circuit situation. The high and low side switching waveforms are exactly 180 degrees out of phase if you run the VI(PWM-VI) you will se there is no dead time between high and low switching so i can have a dangerous short-ckt situation.

 

Here is the picture you will understand. Thanx in advance..

 

 

With Best Regards,

azy

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Hallo Jerry,

 

I attached the relevant png's of the dead time , did you see it?

 

 

 

 

Best Regards,

azy

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Hi!

Could you fix the problem by the time?

 

King Regards

 

Jerry

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Hallo Jerry,

 

I could not understand, what do you mean fix by the time? Could you explain please?

 

 

Regards.

azy

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Hi embedded,

 

Jerry was asking if you still need help. "problem fixed by time" means: your last post is now two weeks ago, so there probably is some advance on your side?

 

Btw. some pseudocode may help:

pwm loop
  set DO1 true
  wait DO1-High-Time
  set DO1 false
  wait deadtime
  set DO2 true
  wait DO2-High-Time
  set DO2 false
  wait deadtime
next iteration

 

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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Hallo GerdW,

 

Thanx for reply, with VI(PWM_new_22_10_2013) i am able to do this but wit the other VI(PWM_high_low_pulse_control_1_deadtime_test) i cannot do the same because it uses the shift register for generating hig-low signal, the other one generates frequency with True and False constants, i want to do it with the VI with shift registers.

 

 

Best Regards,

azy

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Hello GerdW,

 

Did you check the other VI?

 

 

Best Regards,

azy

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