I have a MyRIO and an AD7690 (18bit-ADC). The communication is via SPI and I want to use the data on the FPGA, therefor I want to use the FPGA as interface for further processing.
I only need MISO, SS, SCKL as I am not giving any commands to the slave (ADC). I want to use the SS signal to trigger the start of the conversion.
Now to the problem:
1, There are already VIs in the SPI folder on the target but there is no description at all.
Can someone of you give me a link to their discription?
2, Would you advice me to use the following example: SPI example
I think it is a bit overpowered and it takes a lot of ressources as I only want to read.
Hope someone can give me a suggestion what to use or better write my own interface.
Solved! Go to Solution.
I have build my own interface now but I have a question regarding the possible timing.
1, In the datasheet of the myRIO it is written: SPI 4MHz. Does this mean the 4MBit/s?
2, My second question: Is it possible to get a higher Frequency than 40MHz for the myRIO clock? If yes, how 🙂
3, Third question: Am I right, that if the conversion time of my ADC (2,1µs) + 18bits (50ns each bit) transfer time, the maxmimum sampling frequency of the myRIO is: Ts=2100ns + 18*50ns =3000ns --> Fs=1/Ts = 333.3kHz. The 50ns come from 20MHz SPI Clock.
I hope someone can help me.
1. i could not find any information on that, but i would also suppose that 4MHz means 4MBit/s
2. you can create a derived clock with a multiple of 40MHz by right clicking the clock:
Creating FPGA-Derived Clocks (FPGA Module) - LabVIEW 2012 FPGA Module Help - National Instruments
3. your calculation seems correct, but i will have to check that again.
thanks for your fast answer.
to my 2nd question: Thanks, now I got a 120MHz derived clock.
to my 1st question: Although I am not so versed with SPI, I can only think it has something to do with the hold time. If I would use a 120 MHz derived clock, the maximum speed of my SPI Clock (SCLK) would be 60MHz (as I need high and low state) than I would have a samplerate of 60MHz which is equal to 60MBit/s as every sample is one bit. So maybe the fastest possible SCLK is 4MHz --> 4MBit/s data transfer rate. I could need some verification on that, because the second reason could be, that the SPI-SubVIs which are already in the myRIO project have a maximum clock of 4MHz, but that seems not the right answer...
Short update for question 1:
I called the support and the 4MHz are only valid if you use the SPI VIs which are already in the myRIO project (e.g. SPI Express VI). The 4MHz is also meant to be the maximum SPI clock rate.
As I need faster clockrate and more than 16 bits, I am going to try to build my own interface.
1, Using derived clocks of 80MHz or 120MHz to control a digital clock leads to a sine signal at the output and no rectangle signal any more!
2, In the datasheet is noted: Minimum pulse width of a DIO = 20ns. So derived clocks faster than 40MHz are not usefull for creating a digital clock at the output of a DIO line.
I'm curious, if you have been successful in writing own SPI interface. I like to communicate with MAX31855. I need to read 32bits, what is not possible with default personality.
Thank you for any advice.
I would recommend you to open a new thread.
Nevertheless, I checked your datasheet and your thermocouple sends only 14 bits, not sure why you need 32bits? --> If you missunderstood something and you only have to read this sensor, take the myRIO VIs.
I am going to ask my supervisor, if I can publish my selfmade SPI Vi.
Thank for your really fast answer.
New thread maybe, but I consider it as the same topic - SPI for myRIO. The default personality can read up to 16bits. I think, it is because it uses U16 datatype for read data. But I’m not sure. So my original question (and entreaty) was, if you have your own SPI implementation, where you can set length of the data.
You are right about MAX31855. You can read just 14bits for temperature data, but you need 32bits for all data – thermocouple temperature, cold junction compensation temperature and errors indication (see https://cdn-shop.adafruit.com/datasheets/MAX31855.pdf page 10). And I have problems with reading just 14bits. I have to play with my code more, as I can read data using myRIO default SPI commands but the data read are wrong.
Any advice appreciated because all info I found was for LINX (using Arduino) and nothing for myRIO itself. Some tutorials for FPGA SPI are available, but all are quite complex (=universal) and I haven’t found just simple reader with a various messages lengths.
Ok, you can find my version attached.
But it will take some time until you completely understand my code. Try to understand as much as possible, your datasheet with the serial protocol interface pages (page 5) and the timings (page 4) will help you. To understand CPOL and CPHA check the link shown on the blockdiagram.
I sometimes use terms which can be missleading, like ADC_Select = CS line.I tried to comment most of what I did, but it is possible that it was not enough 🙂
So, take your time to understand and then ask me the questions.
Your first step should be, that you name your digital I/Os the way you want it.
I have SPI.CLK for the clock line, ADC_Select = CS line and SDO = Data line.
Than enter the timings ( you will see what I mean) given by your datasheet.
MISO, is the subVI, where the actual data is read from the data line and written into a boolean array.
Universal SPI v1.0 is the state machine used for fullfilling the SPI requirements to read data 🙂