Hi,
I am wondering if I can use multiple interrupts in an FPGA VI. I've heard conflicting reports, and the compiler doesn't seem to mind it.
I want to use an IRQ in the first frame of each of 4 seperate sequences (each sequence also has its own while loop) in the FPGA VI such that when the host VI reaches that point I can acknowledge IRQ and continue in the sequence in the FPGA VI.
I am doing this because I need to be able to write RS232 commands into a device through the host VI, then execute the signal in the FPGA VI, then send the results back up to the host VI for display.
I can't test it in hardware right now as my PCI-7831R is enroute from Hungary, so any advice would be appreciated.
Ben
